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Showing items 90411-90435 of 2315029 (92602 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:15:20Z |
A 1.45Gb/s (576,288) LDPC decoder for 802.16e standard
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Hung, Jui-Hui; Chen, Sau-Gee |
| 臺大學術典藏 |
2020-05-04T07:53:58Z |
A 1.5 bit 5th order CT/DT delta sigma class D amplifier with power efficiency improvement.
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CHUNG-WEI LIN; Lin, Chung-Wei; Lee, Yung-Pin; Chen, Wen-Tsao |
| 臺大學術典藏 |
2020-06-11T06:34:50Z |
A 1.5 GHz all-digital spread-spectrum clock generator
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Lin, S.-Y.;Liu, S.-I.; Lin, S.-Y.; Liu, S.-I.; SHEN-IUAN LIU |
| 國立臺灣大學 |
2009 |
A 1.5 GHz phase-locked loop with leakage current suppression in 65 nm CMOS
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Chang, J.-Y.; Liu, S.-I. |
| 國立交通大學 |
2018-08-21T05:54:00Z |
A 1.5 mW front-end readout circuit for a small-sized melanin sensor
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Cheng, Shih-Song; Huang, Sheng-Chieh; Tran, Trong-Hieu; Shao, Kai-Yu; Chao, Paul C. -P.; Chiang, Pei-Yu |
| 國立交通大學 |
2017-04-21T06:49:10Z |
A 1.5 mW front-end readout circuit for a small-sized melanin sensor
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Cheng, Shih-Song; Huang, Sheng-Chieh; Tran, Trong-Hieu; Shao, Kai-Yu; Chao, Paul C. -P.; Chiang, Pei-Yu |
| 臺大學術典藏 |
2021-09-02T00:04:03Z |
A 1.5 mW Programmable Acoustic Signal Processor for Hearing Assistive Devices with Speech Intelligibility Enhancement
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Lin Y.-J;Lee Y.-C;Liu H.-M;Chiueh H;Chi T.-S;Yang C.-H.; Lin Y.-J; Lee Y.-C; Liu H.-M; Chiueh H; Chi T.-S; Yang C.-H.; CHIA-HSIANG YANG |
| 國立交通大學 |
2014-12-08T15:25:27Z |
A 1.5 to 37 GHz ultra-broadband MMIC Mouw's star mixer
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Chang, Chi-Yang; Liao, Ching-Ku; Niu, Dow-Chih |
| 國立臺灣大學 |
1994-12 |
A 1.5 V 10 MHz BiCMOS quasi-digital vector modulator for wireless communication IC
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Su, K.W.; Chen, Y.G.; Lai, C.S.; Kuo, J.B.; Wu, J.S.; Tso, H.W. |
| 國立臺灣大學 |
2004 |
A 1.5 V 12-bit 16 MSPS CMOS Pipelined ADC with 68 dB
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Liu, Ming-Huang; Ou, Wei-Yang; Su, Tsung-Yi; Huang, Kuo-Chan; Liu, Shen-Iuan |
| 國立臺灣大學 |
1994-08 |
A 1.5 V BiCMOS dynamic subtracter circuit for low-voltage BiCMOS CPU VLSI
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Chen, Y.G.; Kuo, J.B. |
| 國立臺灣大學 |
1997-08 |
A 1.5 V bootstrapped pass-transistor-based carry look-ahead circuit suitable for low-voltage CMOS VLSI
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Lou, J.H.; Kuo, J.B. |
| 國立交通大學 |
2014-12-08T15:27:47Z |
A 1.5 V CMOS balanced differential switched-capacitor filter with internal clock boosters
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WU, CY; WEY, WS; YU, TC |
| 國立交通大學 |
2014-12-08T15:27:46Z |
A 1.5 v CMOS current-mode cyclic analog-to-digital converter with digital error correction
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CHEN, CC; WU, CY; CHO, JJ |
| 國立臺灣大學 |
1997-08 |
A 1.5 V CMOS high-speed 16-bit÷8-bit divider using the quotient-select architecture and true-single-phase bootstrapped dynamic circuit techniques suitable for low-voltage VLSI
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Yeh, C.C.; Lou, J.H.; Kuo, J.B. |
| 國立臺灣大學 |
2008-12 |
A 1.5-9.6 GHz monolithic active quasi-circulator in 0.18 μm CMOS technology
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Shin, Shih-Chieh; Huang, Jhih-Yu; Lin, Kun-You; Wang, Huei |
| 臺大學術典藏 |
2018-09-10T08:19:02Z |
A 1.5-mW, 23.6% Frequency Locking Range, 24-GHz Injection-Locked Frequency Divider
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Yen-Hung Kuo;Jeng-Han Tsai;Tian-Wei Huang; Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang; TIAN-WEI HUANG |
| 國立臺灣師範大學 |
2014-10-30T09:28:45Z |
A 1.5-mW, 23.6% frequency locking range,24-GHz injection-locked frequency divider
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Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang |
| 國立臺灣師範大學 |
2014-10-30T09:28:45Z |
A 1.5-mW, 23.6% frequency locking range,24-GHz injection-locked frequency divider
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Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang |
| 臺大學術典藏 |
2006-05 |
A 1.5-V 10-ppm//spl deg/C 2nd-order curvature-compensated CMOS bandgap reference with trimming
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Hsiao, Sen-Wen; Huang, Yen-Chih; Liang, David; Chen, H.W.K.; Chen, Hsin-Shu; Hsiao, Sen-Wen; Huang, Yen-Chih; Liang, David; Chen, H.W.K.; Chen, Hsin-Shu |
| 國立臺灣大學 |
2006-05 |
A 1.5-V 10-ppm//spl deg/C 2nd-order curvature-compensated CMOS bandgap reference with trimming
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Hsiao, Sen-Wen; Huang, Yen-Chih; Liang, David; Chen, H.W.K.; Chen, Hsin-Shu |
| 國立交通大學 |
2014-12-08T15:48:10Z |
A 1.5-V 3 similar to 10-GHz 0.18-mu m CMOS Frequency Synthesizer for MB-OFDM UWB Applications
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Huang, Zue-Der; Kuo, Fong-Wei; Wang, Wen-Chieh; Wu, Chung-Yu |
| 臺大學術典藏 |
1999-05 |
A 1.5-V CMOS all-N-logic true-single-phase bootstrapped dynamic-logic circuit suitable for low supply voltage and high-speed pipelined system operation
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J. H. Lou; J. B. Kuo; JAMES-B KUO |
| 國立臺灣大學 |
1999 |
A 1.5-V CMOS all-N-logic true-single-phase bootstrappeddynamic-logic circuit suitable for low supply voltage and high-speedpipelined system operation
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Lou, J.H.; Kuo, J.B. |
| 國立交通大學 |
2019-04-02T05:59:23Z |
A 1.5-V differential cross-coupled bootstrapped BiCMOS logic for low-voltage applications
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Tseng, YK; Wu, CY |
Showing items 90411-90435 of 2315029 (92602 Page(s) Totally)
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