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Showing items 90526-90550 of 2342286  (93692 Page(s) Totally)
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Institution Date Title Author
國立臺灣大學 2009-10-12 A + B model in Quantum Geometry Wang, Chin-Lung
國立臺灣大學 2015 A + B theory in conifold transitions for Calabi-Yau threefolds Lin, Hui-Wen; Lee, Y.-P.; Wang, C.-L.
臺大學術典藏 2015 A + B theory in conifold transitions of Calabi--Yau threefolds Wang, Chin-Lung;Lee, Y.-P.;Lin, H.-W.; Wang, Chin-Lung; Lee, Y.-P.; Lin, H.-W.
國立臺灣大學 2015 A + B theory in conifold transitions of Calabi--Yau threefolds Wang, Chin-Lung; Lee, Y.-P.; Lin, H.-W.
國立交通大學 2014-12-08T15:38:30Z A +/- 6ms-Accuracy, 0.68mm(2) and 2.21 mu W QRS Detection ASIC Wang, Hui-Min; Lai, You-Liang; Hou, Mark C.; Lin, Shih-Hsiang; Yen, Brad S.; Huang, Yu-Chieh; Chou, Lei-Chun; Hsu, Shao-You; Huang, Sheng-Chieh; Jan, Ming-Yie
臺大學術典藏 2020-06-11T06:46:01Z A -194 dBc/Hz FOM interactive current-reused QVCO (ICR-QVCO) with capacitor-coupling self-switching sinusoidal current biasing (CSSCB) phase noise reduction technique Wu, K.-I.;Shen, I.-S.;Jou, C.F.;Chen, C.C.-P.; Wu, K.-I.; Shen, I.-S.; Jou, C.F.; Chen, C.C.-P.; CHUNG-PING CHEN
國立臺灣科技大學 2014 A -21.2 -dBm dual-channel UHF passive CMOS RFID tag design Yao, C.-Y.;Hsia, W.-C.
國立臺灣大學 2006 A -expectation tolerance interval for general balanced mixed linear models Lin, Tsai-Yu; Liao, Chen-Tuo
臺大學術典藏 2013 A 0.004mm2 single-channel 6-bit 1.25GS/s SAR ADC in 40nm CMOS Tai, H.-Y.;Tsai, P.-Y.;Tsai, C.-H.;Chen, H.-S.; Tai, H.-Y.; Tsai, P.-Y.; Tsai, C.-H.; Chen, H.-S.; HSIN-SHU CHEN
國立臺灣大學 2010 A 0.02-mm2 9-bit 50-MS/s Cyclic ADC in a 90-nm Digital CMOS Technology Huang, Yen-Chuan; Lee, Tai-Cheng
臺大學術典藏 2018-09-10T08:19:08Z A 0.02-mm2 9-bit 50-MS/s Cyclic ADC in a 90-nm Digital CMOS Technology Yen-Chuan Huang;Tai-Cheng Lee; Yen-Chuan Huang; Tai-Cheng Lee; TAI-CHENG LEE
國立交通大學 2014-12-08T15:34:51Z A 0.0354mm(2) 82 mu W 125KS/s 3-Axis Readout Circuit for Capacitive MEMS Accelerometer Lai, Kelvin Yi-Tse; He, Zih-Cheng; Yang, Yu-Tao; Chang, Hsie-Chia; Lee, Chen-Yi
國立交通大學 2019-08-02T02:18:26Z A 0.05 V driven ammonia gas sensor based on an organic diode with a top porous layered electrode and an air-stable sensing film Madhaiyan, Govindasamy; Chen, Chao-Hsuan; Wu, Yi-Chu; Horng, Sheng-Fu; Zan, Hsiao-Wen; Meng, Hsin-Fei; Lin, Hong-Cheu
國立成功大學 2020- A 0.07-mm(2) 162-mW DAC Achieving >65 dBc SFDR and <-70 dBc IM3 at 10 GS/s With Output Impedance Compensation and Concentric Parallelogram Routing Huang;Hung-Yi;Kuo;Tai-Haur
國立成功大學 2020 A 0.07-mm2162-mW DAC Achieving >65 dBc SFDR and < -70 dBc IM3 at 10 GS/s with Output Impedance Compensation and Concentric Parallelogram Routing Huang, Huang H.-Y.;Kuo, T.-H.
臺大學術典藏 2018-09-10T08:08:01Z A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine Cheng, C.-C.; Tsai, Y.-M.; Chen, L.-G.; Ch; rakasan, A.P.; LIANG-GEE CHEN; Cheng, C.-C.;Tsai, Y.-M.;Chen, L.-G.;Ch;rakasan, A.P.
國立成功大學 2019 A 0.07mm2 210mW Single-1.1V-Supply 14-bit 10GS/s DAC with Concentric Parallelogram Routing and Output Impedance Compensation Huang, Huang H.-Y.;Kuo, T.-H.
國立交通大學 2014-12-08T15:29:01Z A 0.09 mu W Low Power Front-End Biopotential Amplifier for Biosignal Recording Tseng, Yuhwai; Ho, Yingchieh; Kao, Shuoting; Su, Chauchin
國立交通大學 2014-12-08T15:22:37Z A 0.1-0.3 V 40-123 fJ/bit/ch On-Chip Data Link With ISI-Suppressed Bootstrapped Repeaters Ho, Yingchieh; Su, Chauchin
臺大學術典藏 2004-06 A 0.1-23-GHz SiGe BiCMOS analog multiplier and mixer based on attenuation-compensation technique Tsai, Ming-Da; Lin, Chin-Shen; Wang, Chi-Hsueh; Lien, Chun-Hsien; Wang, Huei; Tsai, Ming-Da; Lin, Chin-Shen; Wang, Chi-Hsueh; Lien, Chun-Hsien; Wang, Huei
國立臺灣大學 2004-06 A 0.1-23-GHz SiGe BiCMOS analog multiplier and mixer based on attenuation-compensation technique Tsai, Ming-Da; Lin, Chin-Shen; Wang, Chi-Hsueh; Lien, Chun-Hsien; Wang, Huei
臺大學術典藏 2018-09-10T05:27:05Z A 0.1-25.5-GHz differential cascaded-distributed amplifier in 0.18-μm CMOS Technology Chihun Lee; Lan-Chou Cho; Shen-Iuan Liu; SHEN-IUAN LIU
國立交通大學 2015-07-21T08:30:59Z A 0.1-3GHz Cell-Based Fractional-N All Digital Phase-Locked Loop Using Delta Sigma Noise-Shaped Phase Detector Liu, Yao-Chia; Chen, Wei-Zen; Chou, Mao-Hsuan; Tsai, Tsung-Hsien; Lee, Yen-Wei; Yuan, Min-Shueh
臺大學術典藏 2018-09-10T06:31:52Z A 0.13μm hardware-efficient probabilistic-based noise-tolerant circuit design and implementation with 24.5dB noise-immunity improvement Wey, I.-C.; Chen, Y.-G.; Yu, C.; Chen, J.; Wu, A.-Y.; AN-YEU(ANDY) WU
臺大學術典藏 2018-09-10T08:43:18Z A 0.16nJ/bit/iteration 3.38mm 2 turbo decoder chip for WiMAX/LTE standards Lin, C.-H.;Chen, C.-Y.;Chang, E.-J.;Wu, A.-Y.; Lin, C.-H.; Chen, C.-Y.; Chang, E.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU

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