| 臺大學術典藏 |
2021-09-02T00:04:03Z |
A 1.5 mW Programmable Acoustic Signal Processor for Hearing Assistive Devices with Speech Intelligibility Enhancement
|
Lin Y.-J;Lee Y.-C;Liu H.-M;Chiueh H;Chi T.-S;Yang C.-H.; Lin Y.-J; Lee Y.-C; Liu H.-M; Chiueh H; Chi T.-S; Yang C.-H.; CHIA-HSIANG YANG |
| 國立交通大學 |
2014-12-08T15:25:27Z |
A 1.5 to 37 GHz ultra-broadband MMIC Mouw's star mixer
|
Chang, Chi-Yang; Liao, Ching-Ku; Niu, Dow-Chih |
| 國立臺灣大學 |
1994-12 |
A 1.5 V 10 MHz BiCMOS quasi-digital vector modulator for wireless communication IC
|
Su, K.W.; Chen, Y.G.; Lai, C.S.; Kuo, J.B.; Wu, J.S.; Tso, H.W. |
| 國立臺灣大學 |
2004 |
A 1.5 V 12-bit 16 MSPS CMOS Pipelined ADC with 68 dB
|
Liu, Ming-Huang; Ou, Wei-Yang; Su, Tsung-Yi; Huang, Kuo-Chan; Liu, Shen-Iuan |
| 國立臺灣大學 |
1994-08 |
A 1.5 V BiCMOS dynamic subtracter circuit for low-voltage BiCMOS CPU VLSI
|
Chen, Y.G.; Kuo, J.B. |
| 國立臺灣大學 |
1997-08 |
A 1.5 V bootstrapped pass-transistor-based carry look-ahead circuit suitable for low-voltage CMOS VLSI
|
Lou, J.H.; Kuo, J.B. |
| 國立交通大學 |
2014-12-08T15:27:47Z |
A 1.5 V CMOS balanced differential switched-capacitor filter with internal clock boosters
|
WU, CY; WEY, WS; YU, TC |
| 國立交通大學 |
2014-12-08T15:27:46Z |
A 1.5 v CMOS current-mode cyclic analog-to-digital converter with digital error correction
|
CHEN, CC; WU, CY; CHO, JJ |
| 國立臺灣大學 |
1997-08 |
A 1.5 V CMOS high-speed 16-bit÷8-bit divider using the quotient-select architecture and true-single-phase bootstrapped dynamic circuit techniques suitable for low-voltage VLSI
|
Yeh, C.C.; Lou, J.H.; Kuo, J.B. |
| 國立臺灣大學 |
2008-12 |
A 1.5-9.6 GHz monolithic active quasi-circulator in 0.18 μm CMOS technology
|
Shin, Shih-Chieh; Huang, Jhih-Yu; Lin, Kun-You; Wang, Huei |
| 臺大學術典藏 |
2018-09-10T08:19:02Z |
A 1.5-mW, 23.6% Frequency Locking Range, 24-GHz Injection-Locked Frequency Divider
|
Yen-Hung Kuo;Jeng-Han Tsai;Tian-Wei Huang; Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang; TIAN-WEI HUANG |
| 國立臺灣師範大學 |
2014-10-30T09:28:45Z |
A 1.5-mW, 23.6% frequency locking range,24-GHz injection-locked frequency divider
|
Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang |
| 國立臺灣師範大學 |
2014-10-30T09:28:45Z |
A 1.5-mW, 23.6% frequency locking range,24-GHz injection-locked frequency divider
|
Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang |
| 臺大學術典藏 |
2006-05 |
A 1.5-V 10-ppm//spl deg/C 2nd-order curvature-compensated CMOS bandgap reference with trimming
|
Hsiao, Sen-Wen; Huang, Yen-Chih; Liang, David; Chen, H.W.K.; Chen, Hsin-Shu; Hsiao, Sen-Wen; Huang, Yen-Chih; Liang, David; Chen, H.W.K.; Chen, Hsin-Shu |
| 國立臺灣大學 |
2006-05 |
A 1.5-V 10-ppm//spl deg/C 2nd-order curvature-compensated CMOS bandgap reference with trimming
|
Hsiao, Sen-Wen; Huang, Yen-Chih; Liang, David; Chen, H.W.K.; Chen, Hsin-Shu |
| 國立交通大學 |
2014-12-08T15:48:10Z |
A 1.5-V 3 similar to 10-GHz 0.18-mu m CMOS Frequency Synthesizer for MB-OFDM UWB Applications
|
Huang, Zue-Der; Kuo, Fong-Wei; Wang, Wen-Chieh; Wu, Chung-Yu |
| 臺大學術典藏 |
1999-05 |
A 1.5-V CMOS all-N-logic true-single-phase bootstrapped dynamic-logic circuit suitable for low supply voltage and high-speed pipelined system operation
|
J. H. Lou; J. B. Kuo; JAMES-B KUO |
| 國立臺灣大學 |
1999 |
A 1.5-V CMOS all-N-logic true-single-phase bootstrappeddynamic-logic circuit suitable for low supply voltage and high-speedpipelined system operation
|
Lou, J.H.; Kuo, J.B. |
| 國立交通大學 |
2014-12-08T15:47:31Z |
A 1.5-V differential cross-coupled bootstrapped BiCMOS logic for low-voltage applications
|
Tseng, YK; Wu, CY |
| 國立交通大學 |
2019-04-02T05:59:23Z |
A 1.5-V differential cross-coupled bootstrapped BiCMOS logic for low-voltage applications
|
Tseng, YK; Wu, CY |
| 國立臺灣科技大學 |
2009 |
A 1.5-V transformer-based ultra-wideband LNA chip design
|
Huang J.-F.; Shie P.-J.; Liu R.-Y. |
| 國立交通大學 |
2014-12-08T15:27:05Z |
A 1.5-V, 2.4GHz CMOS low-noise amplifier
|
Yang, JN; Lee, CY; Hsu, TY; Hsu, TR; Wang, CC |
| 臺大學術典藏 |
2021-09-02T00:04:03Z |
A 1.5-μJ/Task Path-Planning Processor for 2-D/3-D Autonomous Navigation of Microrobots
|
Chung C;Yang C.-H.; Chung C; Yang C.-H.; CHIA-HSIANG YANG |
| 國立臺灣大學 |
2009 |
A 1.5GHz all-digital spread spectrum clock generator
|
Lin, Sheng-You; Liu, Shen-Iuan |
| 臺大學術典藏 |
2018-09-10T07:41:58Z |
A 1.5GHz all-digital spread spectrum clock generator
|
Sheng-You Lin;Shen-Iuan Liu; Sheng-You Lin; Shen-Iuan Liu; SHEN-IUAN LIU |
