臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

	English \| 正體中文 \| 简体中文 \| 0
	???header.visitor??? : 52711523 ???header.onlineuser??? : 514 ???header.sponsordeclaration???

???search.scope???

???search.advance???

???search.login???

???search.administrator???

臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

???ui.leftmenu.abouttair???
	???ui.leftmenu.explanation???

???ui.leftmenu.bartitle???
	Repositories
	Author
	Title
	Date
	???ui.leftmenu.statisticschart???
	???ui.leftmenu.realtimefacts???
	???ui.leftmenu.trend???

???index.news???
	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

???ui.leftmenu.copyrighttitle???
	???ui.leftmenu.copyrightpublisher???
	???ui.leftmenu.copyrightconference???

???ui.leftmenu.link???
	機構典藏計畫網站
	ROAR
	OpenDOAR
	SHERPA
	OAIster
	JAIRO
	Ira
	DSPACE
	RWWR
	臺大學術典藏NTU Scholars

"cho lan chou"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1???	???jsp.browse.items-by-author.order2???

Showing items 1-4 of 4 (1 Page(s) Totally)
1
View [10|25|50] records per page

Institution	Date	Title	Author
國立臺灣大學	2009	A 33.6-to-33.8Gb/s burst-mode CDR in 90nm CMOS technology	Cho, Lan-Chou; Lee, Chihun; Hung, Chao-Ching; Liu, Shen-Iuan
國立臺灣大學	2008-07	A 81.5~85.9GHz injection-locked frequency divider in 65nm CMOS	Cho, Lan-Chou; Tsai, Kun-Hung; Hung, Chao-Ching; Liu, Shen-Iuan
國立臺灣大學	2008	A 50.8–53-GHz Clock Generator Using a Harmonic-Locked PD in 0.13-μm CMOS	Lee, Chihun; Cho, Lan-Chou; Wu, Jia-Hao; Liu, Shen-Iuan
國立臺灣大學	2007	A 1.2-V 37–38.5-GHz Eight-Phase Clock Generator in 0.13- μm CMOS Technology	Cho, Lan-Chou; Lee, Chihun; Liu, Shen-Iuan

Showing items 1-4 of 4 (1 Page(s) Totally)
1
View [10|25|50] records per page