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"lin chen shang"
Showing items 11-20 of 70 (7 Page(s) Totally)
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| 國立臺灣大學 |
1994-03 |
Direct synthesis of hazard-free asynchronous circuits from STGs based on lock relation and MG-decomposition approach
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Lin, Kuan-Jen; Kuo, Jih-Wen; Lin, Chen-Shang |
| 國立臺灣大學 |
1994-02 |
Direct Synthesis of Hazard-Free Asynchronous Circuits from STGs Based on Lock Relation and MG-Decomposition Approach
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Lin, K. J.; Kuo, J. W.; 林呈祥; Lin, K. J.; Kuo, J. W.; Lin, Chen-Shang |
| 國立臺灣大學 |
1994 |
超大型積體電路電腦輔助設計系統I-4:非同步電路
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林呈祥; Lin, Chen-Shang |
| 國立臺灣大學 |
1994 |
HyHOPE:a Fast Fault Simulator with Efficient Simulation of Hypertrophic Faults
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Kung, C.; 林呈祥; Kung, C.; Lin, Chen-Shang |
| 國立臺灣大學 |
1994 |
Optimized Synthesis of Hazard-Free Asynchronous Circuits
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Lin, K. J.; Kuo, J. W.; 林呈祥; Lin, K. J.; Kuo, J. W.; Lin, Chen-Shang |
| 國立臺灣大學 |
1994 |
Reducing Hypertrophic Fault Events in Sequential Fault Simulation
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Kung, C.; 林呈祥; Kung, C.; Lin, Chen-Shang |
| 國立臺灣大學 |
1994 |
Test Time Reduction for Scan-Designed Circuits by Sliding Compatibility
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Chang, J. S.; 林呈祥; Chang, J. S.; Lin, Chen-Shang |
| 國立臺灣大學 |
1994 |
在MCM環境下之測試樣本產生系統
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林少傑; 林呈祥; 林少傑; Lin, Chen-Shang |
| 國立臺灣大學 |
1993-08 |
Automatic Synthesis of Hazard Free Asynchronous Circuits Based on Transitive Lock Relation
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Lin, K.; Kuo, J.; 林呈祥; Lin, K.; Kuo, J.; Lin, Chen-Shang |
| 國立臺灣大學 |
1993-08 |
Building BDDs with Ordering-Reshuffle Strategy
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Yeh, F.; 林呈祥; Yeh, F.; Lin, Chen-Shang |
Showing items 11-20 of 70 (7 Page(s) Totally)
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