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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T07:36:56Z	BIST design optimization for large-scale embedded memory cores	Chien, T.-F.;Chao, W.-C.;Li, C.-M.;Chang, Y.-W.;Liao, K.-Y.;Chang, M.-T.;Tsai, M.-H.;Tseng, C.-M.; Chien, T.-F.; Chao, W.-C.; Li, C.-M.; Chang, Y.-W.; Liao, K.-Y.; Chang, M.-T.; Tsai, M.-H.; Tseng, C.-M.; YAO-WEN CHANG
臺大學術典藏	2018-09-10T07:43:08Z	BIST Design Optimization for Large-Scale Embedded Memory Cores	T.-F. Chien;W.-C. Chao;J. C.-M. Li;K.-Y. Liao;Y.-W. Chang;M.-T. Chang;M.-H. Tsai;C.-M. Tseng; T.-F. Chien; W.-C. Chao; J. C.-M. Li; K.-Y. Liao; Y.-W. Chang; M.-T. Chang; M.-H. Tsai; C.-M. Tseng; CHIEN-MO LI
臺大學術典藏	2020-06-16T06:31:35Z	BIST design optimization for large-scale embedded memory cores.	Chien, Tzuo-Fan;Chao, Wen-Chi;Li, James Chien-Mo;Chang, Yao-Wen;Liao, Kuan-Yu;Chang, Ming-Tung;Tsai, Min-Hsiu;Tseng, Chih-Mou; Chien, Tzuo-Fan; Chao, Wen-Chi; Li, James Chien-Mo; Chang, Yao-Wen; Liao, Kuan-Yu; Chang, Ming-Tung; Tsai, Min-Hsiu; Tseng, Chih-Mou; YAO-WEN CHANG
國立交通大學	2014-12-08T15:12:36Z	BIST for measuring clock jitter of charge-pump phase-locked loops	Hsu, Jen-Chien; Su, Chauchin
國立交通大學	2014-12-08T15:42:11Z	BIST scheme for DAC testing	Chang, SJ; Lee, CL; Chen, JE
國立成功大學	1998-06-11	BIST structure for DAC testing	Wen, Yun-Che; Lee, Kuen-Jong
國立成功大學	2011-11	Bistability and spatial hysteresis in an Nd:GdVO(4) laser with an intracavity twisted-nematic liquid crystal	Wei, M. -D.; Huang, D. -Y.; Hsu, C. -C.; Chang, A. -K.; Lin, J. -H.
淡江大學	2021-01-19	Bistability induced by a spontaneous twisting rate for a two-dimensional intrinsically curved filament	Zhou, Zicong
淡江大學	2022-02-14	Bistability of a helical filament confined on a cylinder	Zhou, Zicong
國立彰化師範大學	2007	Bistable Behavior of Nanoparticle-Doped Liquid Crystal Cell	Wu, Chih-Wei; Huang, Chi-Yen

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