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Showing items 256311-256335 of 2346288  (93852 Page(s) Totally)
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Institution Date Title Author
國立成功大學 2003-10 Circuit implementation of linguistic-hedge fuzzy logic controller in current-mode approach Chen, Chuen-Yau; Hsieh, Yuan-Ta; Liu, Bin-Da
臺大學術典藏 2021-09-02T00:05:32Z Circuit learning for logic regression on high dimensional boolean space Chen P.-W;Huang Y.-C;Lee C.-L;Jiang J.-H.R.; Chen P.-W; Huang Y.-C; Lee C.-L; Jiang J.-H.R.; JIE-HONG JIANG
國立臺灣大學 2004 Circuit modeling and noise reduction for bent differential transmission lines Shiue, Guang-Hwa; Guo, Wei-De; Liu, Li-Shang; Wu, Ruey-Beei
元智大學 2005-10 Circuit modeling of power/ground plane structures for printed circuit boards 黃建彰
國立臺灣大學 2004 Circuit Partition and Reordering Technique for Low Power IP Tsai, Kun-Lin; Ruan, Shanq-Jang; Huang, Chun-Ming; Naroska, Edwin; Lai, Feipei
臺大學術典藏 2018-09-10T04:59:56Z Circuit Partition and Reordering Technique for Low Power IP Kun-lin Tsai,; Shanq-jang Ruan,; Chun-ming Huang,; Edwin Naroska,; Feipei Lai,; FEI-PEI LAI
國立交通大學 2014-12-08T15:25:06Z Circuit performance degradation of sample-and-hold amplifier due to gate-oxide overstress in a 130-nm CMOS process Chen, Jung-Sheng; Ker, Ming-Dou
國立交通大學 2014-12-08T15:12:29Z Circuit performance degradation of switched-capacitor circuit with bootstrapped technique due to gate-oxide overstress in a 130-nm CMOS process Chen, Jung-Sheng; Ker, Ming-Dou
臺大學術典藏 2018-09-10T04:33:46Z Circuit placement in arbitrarily shaped regions using neural network Chang, Ray-I; Hsiao, Pei-Yung; RAY-I CHANG
國立交通大學 2014-12-08T15:28:00Z CIRCUIT PLACEMENT IN ARBITRARILY-SHAPED REGIONS USING NEURAL-NETWORK CHANG, RI; HSIAO, PY
國立高雄第一科技大學 2011.08 CIRCUIT RELIABILITY EVALUATION USING TWO-STAGE COMPLEX NETWORK ANALYSIS Huang, Ming-Chih;Chen, Ming-Huei;Chen, Hao-Hui;Ting, Yi-Chuan;Huang, Hong-Hsin
淡江大學 2014-08 Circuit Simulation for Solar Power Maximum Power Point Tracking with Different Buck-Boost Converter Topologies 蕭照焜; 李珉毅; 魏煜宸; 陳柏志
淡江大學 2014-03 Circuit Simulation for Solar Power Maximum Power Point Tracking with Different Buck-Boost Converter Topologies 蕭照焜;李珉毅;魏煜宸;陳柏志
國立交通大學 2014-12-08T15:24:42Z Circuit Solutions on ESD Protection Design for Mixed-Voltage I/O Buffers in Nanoscale CMOS Ker, Ming-Dou; Wang, Chang-Tzu
義守大學 1999-07 Circuit solutions on ESD protection design for mixed-voltage I/O buffers in nanoscale CMOS Ker, Ming-Dou ; Wang, Chang-Tzu
國立成功大學 2021-06-01 Circuit system and circuit control method applied to motor drive Tsai, Mi-Ching;Pai, Fu-Sheng;Hsieh, Min-Fu;Shih, Kai-Jung;Wu, Zheng-Xuan; 蔡明祺
國立臺灣科技大學 2007-03 Circuit Techniques for CMOS Divide-By-Four Frequency Divider Jang, S.-L.;Chuang, Y.-H.;Lee, S.-H.;Chao, J.-J.
國立屏東大學 2007 Circuit Tolerance Design Using an Improved Immune Algorithm 蔡進聰;J.T.Tsai;W.H.Ho;J.H.Chou;T.K.Liu
國立中山大學 1992-05 Circuit Verification Using a Theorem Prover S.J. Lee;W.J. Lin
國立交通大學 2019-09-02T07:46:21Z Circuit-based logical layer 2 bridging in software-defined data center networking Wang, Yao-Chun; Lin, Ying-Dar
國立交通大學 2015-12-02T02:59:16Z Circuit-Simulation-Based Multi-Objective Evolutionary Algorithm for Design Optimization of a-Si:H TFTs Gate Driver Circuits Under Multilevel Clock Driving Hung, Sheng-Chin; Chiang, Chien-Hsueh; Li, Yiming
國立交通大學 2019-04-02T06:04:33Z Circuit-Simulation-Based Multi-objective Evolutionary Algorithm with Multi-Level Clock Driving Technique for a-Si:H TFTs Gate Driver Circuit Design Optimization Hung, Sheng-Chin; Chen, Chieh-Yang; Chiang, Chien-Hsueh; Li, Yiming
國立交通大學 2014-12-08T15:43:19Z Circuit-switched broadcasting in multi-port multi-dimensional torus networks Wang, SY; Tseng, YC; Ni, SY; Sheu, JP
義守大學 2001-11 Circuit-switched broadcasting in multi-port multi-dimensional torus networks San-Yuan Wang;Yu-Chee Tseng;Sze-Yao Ni;Jang-Ping Sheu
臺大學術典藏 2022-04-14T08:52:05Z Circuitous Path to Live Donor Liver Transplantation from the Coordinator's Perspective Lin, Hui-Ying; Ho, Cheng-Maw; Hsieh, Pei-Yin; Lin, Min-Heuy; Wu, Yao-Ming; MING-CHIH HO; Lee, Po-Huang; Hu, Rey-Heng

Showing items 256311-256335 of 2346288  (93852 Page(s) Totally)
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