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Institution	Date	Title	Author
臺大學術典藏	2005-06	Crosstalk- and Performance-Driven Multilevel Full-Chip Routing	Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; Lee, Der-Tsai; Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; Lee, Der-Tsai
國立臺灣大學	2005-06	Crosstalk- and Performance-Driven Multilevel Full-Chip Routing	Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; Lee, Der-Tsai
國立臺灣大學	2005	Crosstalk- and performance-driven multilevel full-chip routing	Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; Lee, Der-Tsai
國立臺灣大學	2005-06	Crosstalk- and Performance-Driven Multilevel Full-Chip Routing	Ho, T. Y.; Chang, Y. W.; Lee, S. J.; Chen, D.T.
臺大學術典藏	2018-09-10T05:23:30Z	Crosstalk- and performance-driven multilevel full-chip routing	Ho, T.-Y.; Chang, Y.-W.; Chen, S.-J.; Lee, D.-T.; YAO-WEN CHANG; SAO-JIE CHEN
元智大學	2007-06	Crosstalk-aware domino-logic synthesis	劉一宇; TingTing Hwang
國立交通大學	2014-12-08T15:27:03Z	Crosstalk-constrained performance optimization by using wire sizing and perturbation	Pan, SR; Chang, YW
臺大學術典藏	2018-09-10T03:29:38Z	Crosstalk-constrained performance optimization by using wire sizing and perturbation	Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG
國立交通大學	2014-12-08T15:44:51Z	Crosstalk-driven interconnect optimization by simultaneous gate and wire sizing	Jiang, IHR; Chang, YW; Jou, JY
臺大學術典藏	2018-09-10T03:29:38Z	Crosstalk-driven interconnect optimization by simultaneous gate and wire sizing	Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG

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