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Institution Date Title Author
國立交通大學 2014-12-08T15:37:53Z Gate Direct Tunneling Current in Uniaxially Compressive Strained nMOSFETs: A Sensitive Measure of Electron Piezo Effective Mass Lee, Wei-Han; Chen, Ming-Jer
臺大學術典藏 2018-09-10T06:37:17Z Gate Drive for GTO Devices S. Chin;D. Y. Chen; S. Chin; D. Y. Chen; DAN CHEN
國立成功大學 2017-08 Gate Driver Based on a-Si:H Thin-Film Transistors With Two-Step-Bootstrapping Structure for High-Resolution and High-Frame-Rate Displays Lin;Chih-Lung;Chen;Fu-Hsing;Wang;Ming-Xun;Lai;Po-Cheng;Tseng;Chin-Hsien
國立成功大學 2016-11 Gate Driver Circuit Using Pre-Charge Structure and Time-Division Multiplexing Driving Scheme for Active-Matrix LCDs Integrated with In-Cell Touch Structures Lin, Chih-Lung; Deng, Ming-Yang; Wu, Chia-En; Chen, Po-Syun; Wang, Ming-Xun
國立成功大學 2017 Gate driver circuit with fast-falling structure for high-resolution applications Tseng, C.-H.;Chen, F.-H.;Lai, P.-C.;Lin, C.-L.
國立成功大學 2023 Gate Driver Design and Device Characterization for 3.3 kV SiC MOSFET Modules Gutierrez, B.;Hou, Z.;Jiao, D.;Hsieh, Hsieh H.-C.;Chen, X.;Liao, H.;Lai, J.-S.;Yu, M.-H.;Chen, K.-W.
國立交通大學 2018-03-01 GATE DRIVING CIRCUIT Yu-Fan Tu; Guang-Ting Zheng; Po-Tsun Liu; Wen-Che Wang; Yuan-Hao Chang; Chi-Liang Kuo; Wen-Chuan Wang; Han-Lung Liu; Wei-Lien Sung
國立暨南國際大學 2013 Gate field induced ordered electric dipoles in a polymer dielectric for low-voltage operating organic thin-film transistors Chen, JH
國立成功大學 2013 Gate field induced ordered electric dipoles in a polymer dielectric for low-voltage operating organic thin-film transistors Chou, Wei-Yang; Ho, Tsung-Yeh; Cheng, Horng-Long; Tang, Fu-Ching; Chen, Jiann Heng; Wang, Yu-Wu
國立成功大學 2016-02 Gate Insulator Morphology-Dependent Reliability in Organic Thin-Film Transistors Chen, Hua-Mao; Chang, Ting-Chang; Tai, Ya-Hsiang; Chiang, Hsiao-Cheng; Liu, Kuan-Hsien; Chen, Min-Chen; Huang, Cheng-Chieh; Lee, Chao-Kuei
國立交通大學 2017-04-21T06:55:43Z Gate Insulator Morphology-Dependent Reliability in Organic Thin-Film Transistors Chen, Hua-Mao; Chang, Ting-Chang; Tai, Ya-Hsiang; Chiang, Hsiao-Cheng; Liu, Kuan-Hsien; Chen, Min-Chen; Huang, Cheng-Chieh; Lee, Chao-Kuei
臺大學術典藏 2018-09-10T04:28:26Z Gate leakage suppression and contact engineering in nitride heterostructures Wu, YR; Singh, M; Singh, J; YUH-RENN WU
臺大學術典藏 2018-09-10T04:59:04Z Gate Misalignment Effect Related Capacitance Behavior of a 100nm DG FD SOI NMOS Device with n+/p+ Poly Top/Bottom Gate C. H. Hsu; C. P. Yang; JAMES-B KUO; J. B. Kuo
國立成功大學 2020 Gate operation for habitat-oriented water management at Budai Salt Pan Wetland in Taiwan Wang, H.-W.;Kuo, P.-H.;Dodd, A.E.
國立交通大學 2014-12-16T06:14:04Z Gate oxide breakdown-withstanding power switch structure Yang Hao-I; Chuang Ching-Te; Hwang Wei
國立交通大學 2014-12-16T06:15:14Z GATE OXIDE BREAKDOWN-WITHSTANDING POWER SWITCH STRUCTURE YANG Hao-I; Chuang Ching-Te; Hwang Wei
國立交通大學 2014-12-08T15:45:36Z Gate oxide integrity of thermal oxide grown on high temperature formed Si0.3Ge0.7 Wu, YH; Chin, A
國立臺灣大學 2010 Gate oxide wear out using novel polysilazane-base inorganic as nano-scaling shallow trench filling Ho, Ching Yuan; Shih, Kai-Yao; He, Jr Hau
中原大學 2010-04 Gate Oxide Weat out Using Novel Polysilazane-base Inorganic as Nano-scaling Shallow Trench Filling Ching Yuan. Ho;Kai-Yao.Shih ; jr Hau He,
國立交通大學 2014-12-08T15:27:45Z Gate oxynitride grown in N2O and annealed in no using rapid thermal processing Sun, SC; Chen, CH; Lou, JC; Yen, LW; Lin, CJ
國立交通大學 2014-12-08T15:36:34Z Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer Hsieh, Ting-En; Chang, Edward Yi; Song, Yi-Zuo; Lin, Yueh-Chin; Wang, Huan-Chung; Liu, Shin-Chien; Salahuddin, Sayeef; Hu, Chenming Calvin
國立交通大學 2019-04-02T06:00:51Z Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer Hsieh, Ting-En; Chang, Edward Yi; Song, Yi-Zuo; Lin, Yueh-Chin; Wang, Huan-Chung; Liu, Shin-Chien; Salahuddin, Sayeef; Hu, Chenming Calvin
國立交通大學 2015-12-04T07:03:12Z GATE STRUCTURE CHANG Yi; KUO Chien-I; HSU Heng-Tung
國立成功大學 2017 Gate structure engineering for enhancement-mode AlGaN/GaN MOSHEMT Liu, H.-Y.;Lee, C.-S.;Lin, C.-W.;Chiang, M.-H.;Hsu, W.-C.
國立交通大學 2014-12-16T06:16:19Z Gate structure of metal oxide semiconductor field effect transistor Bing-Yue, Tsui; Chih-Feng, Huang
國立交通大學 2019-04-03T06:43:59Z Gate tunable spin-orbit coupling and weak antilocalization effect in an epitaxial La2/3Sr1/3MnO3 thin film Chiu, Shao-Pin; Yamanouchi, Michihiko; Oyamada, Tatsuro; Ohta, Hiromichi; Lin, Juhn-Jong
臺大學術典藏 2018-09-10T08:18:06Z Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Gate Tunneling Leakage Current Behavior of 40nm PD SOI NMOS Device Considerign the Floating Body Effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
國立高雄師範大學 2010 Gate voltage swing enhancement of an InGaP/InGaAs pseudomorphic HFET with low-to-high double doping channels Jung-Hui Tsai;Wen-Shiung Lour;Chia-Hua Huang;Sheng-Shiun Ye;Yung-Chun Ma; 蔡榮輝
國立臺灣海洋大學 2010-10-28 Gate voltage swing enhancement of InGaP/ InGaAs pseudomorphic HFET with low-to-high double doping channels J.-H. Tsai; W.-S. Lour; C.-H. Huang; S.-S. Ye; Y.-C. Ma
臺大學術典藏 2018-09-10T07:04:10Z Gate width dependence on backscattering characteristics in the nanoscale strained complementary metal-oxide-semiconductor field-effect transistor Liao, M.H.; Liu, C.W.; Yeh, L.; Lee, T.-L.; Liang, M.-S.; CHEE-WEE LIU
臺大學術典藏 2020-01-13T08:22:40Z Gate width dependence on backscattering characteristics in the nanoscale strained complementary metal-oxide-semiconductor field-effect transistor Liao, M.H.; Liu, C.W.; Yeh, L.; Lee, T.-L.; Liang, M.-S.; MING-HAN LIAO
國立交通大學 2014-12-08T15:36:25Z Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels Tsai, Jung-Ruey; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan
臺大學術典藏 2018-09-10T14:58:05Z Gate-all-around Ge FETs Liu, C.W.;Chen, Y.-T.;Hsu, S.-H.; Liu, C.W.; Chen, Y.-T.; Hsu, S.-H.; CHEE-WEE LIU
國立交通大學 2014-12-08T15:11:50Z Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels Su, Chun-Jung; Tsai, Tzu-I; Liou, Yu-Ling; Lin, Zer-Ming; Lin, Horng-Chih; Chao, Tien-Sheng
國立交通大學 2015-12-02T02:59:20Z Gate-all-around poly-Si nanowire junctionless thin-film transistors with multiple channels Tso, Chia-Tsung; Liu, Tung-Yu; Sheu, Jeng-Tzong
國立交通大學 2014-12-08T15:27:28Z Gate-All-Around Poly-Si TFTs With Single-Crystal-Like Nanowire Channels Kang, Tsung-Kuei; Liao, Ta-Chuan; Lin, Chia-Min; Liu, Han-Wen; Wang, Fang-Hsing; Cheng, Huang-Chung
國立交通大學 2014-12-08T15:22:22Z Gate-all-around polycrystalline-silicon thin-film transistors with self-aligned grain-growth nanowire channels Liao, Ta-Chuan; Kang, Tsung-Kuei; Lin, Chia-Min; Wu, Chun-Yu; Cheng, Huang-Chung
國立交通大學 2014-12-08T15:30:22Z Gate-All-Around Single-Crystal-Like Poly-Si Nanowire TFTs With a Steep-Subthreshold Slope Liu, Tung-Yu; Lo, Shen-Chuan; Sheu, Jeng-Tzong
國立成功大學 2004-11-22 Gate-alloy-related kink effect for metamorphic high-electron-mobility transistors Chen, Y. J.; Hsu, Wei-Chou; Lee, C. S.; Wang, T. B.; Tseng, C. H.; Huang, J. C.; Huang, D. H.; Wu, C. L.
臺大學術典藏 2018-09-10T14:57:38Z Gate-bias stress stability of P-type SnO thin-film transistors fabricated by RF-sputtering Chiu, I.-C.;Cheng, I.-C.; Chiu, I.-C.; Cheng, I.-C.; I-CHUN CHENG
國立交通大學 2015-12-04T07:03:11Z GATE-BOOSTING RECTIFIER AND METHOD OF PERMITTING CURRENT TO FLOW IN FAVOR OF ONE DIRECTION WHEN DRIVEN BY AC INPUT VOLTAGE Wang Yu-Jiu; Liao I-No; Tsai Chao-Han; Pakasiri Chatrpol
國立中山大學 2006 Gate-controlled spin splitting in GaN/AlN quantum wells Ikai Lo;W.T. Wang;M.H. Gao;J.K. Tsai;S.F. Tsay;J.C. Chiang
國立中山大學 2006 Gate-controlled Spin Splitting in GaN/AlN Quantum Wells Ikai Lo;W.T. Wang;M.H. Gau;S.F. Tsay;Jih-Chen Chiang
國立中山大學 2006 Gate-Controlled Spin Splitting in GaN/AlN Quantum Wells Ikai Lo;W.T. Wang;M.H. Gau;J.K. Tsai;S.F. Tsay;J.C. Chiang
國立交通大學 2014-12-08T15:17:41Z Gate-controlled ZnO nanowires for field-emission device application Li, SY; Lee, CY; Lin, P; Tseng, TY
國立交通大學 2014-12-08T15:31:00Z Gate-first n-MOSFET with a sub-0.6-nm EOT gate stack Cheng, C. H.; Chou, K. I.; Chin, A.
國立交通大學 2014-12-08T15:47:59Z Gate-First TaN/La(2)O(3)/SiO(2)/Ge n-MOSFETs Using Laser Annealing Chen, W. B.; Wu, C. H.; Shie, B. S.; Chin, Albert
中華大學 2010 Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing 吳建宏; rossiwu
國立交通大學 2019-04-02T06:00:27Z Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing Chen, W. B.; Wu, C. H.; Shie, B. S.; Chin, Albert

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