| 淡江大學 |
2006-12 |
Hardware Implementation of AWGN Channel Module
|
Wu, Rong-hou; Lee, Yang-han; Tseng, Hsien-wei; Jan, Yih-guang; Tseng, Wei-chieh; Chung, Ming-hsueh; Tseng, Chih-hsiang |
| 國立彰化師範大學 |
2006-09 |
Hardware Implementation of Discrete Wavelet Transform for Power Transient Signal Detection
|
Xi-Long Yang; Chau-Shing Wang; Wen-Ren Yang |
| 中華大學 |
2005 |
Hardware Implementation of Fast 3-D Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Hardware Implementation of Fast 3-D Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2005 |
Hardware Implementation of Fast 3-D Rotation Using Double Rotation CORDIC Algorithm in Graphic Engine
|
林國珍; Lin, Kuo-Jen |
| 中華大學 |
2005 |
Hardware Implementation of High-Throughput 3-D Rotation for Graphic Engine Using Double Rotation CORDIC Algorithm
|
宋志雲; Sung, Tze-Yun |
| 國立成功大學 |
2023 |
Hardware Implementation of High-Throughput S-Box in AES for Information Security
|
Lin;Shih-Hsiang;Lee;Jun-Yi;Chuang;Chia-Chou;Lee;Narn-Yih;Chen;Pei-Yin;Chin;Wen-Long |
| 國立成功大學 |
2017 |
Hardware implementation of local mean decomposition
|
Chen, P.-Y.;Lai, Y.-C.;Lai, P.-H. |
| 國立成功大學 |
2017-01 |
Hardware Implementation of Local Mean Decomposition
|
Chen;Pei-Yin;Lai;Yen-Chen;Lai;Ping-Hsuan |
| 臺大學術典藏 |
2021-09-02T00:04:17Z |
Hardware implementation of physically unclonable function (puf) in perpendicular STT MRAM
|
Wang D.Y;Hsin Y.C;Lee K.Y;Chen G.L;Yang S.Y;Lee H.H;Chang Y.J;Wang I.J;Kuo Y.C;Chen Y.S;Wang P.H;Wu C.I;Tang D.D.; Wang D.Y; CHIH-I WU et al. |
| 臺大學術典藏 |
2018-09-10T09:25:45Z |
Hardware Implementation of Pixel Detection in Gray-Scale Holographic Data Storage Systems
|
C. Y. Chen;T. D. Chiueh; C. Y. Chen; T. D. Chiueh; TZI-DAR CHIUEH |
| 淡江大學 |
2005-12 |
Hardware Implementation of QoS Scheduling for WiMAX System by Using Genetic Algorithm
|
李揚漢; 詹益光 |
| 義守大學 |
2010-05 |
Hardware Implementation of RFID Mutual Authentication Protocol
|
Yu-Jung Huang;Ching-Chien Yuan;Ming-Kun Chen;Wei-Cheng Lin;Hsien-Chiao Teng |
| 臺大學術典藏 |
2003-09 |
Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2003-09 |
Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank
|
Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:27:46Z |
Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9,7) filter bank
|
Huang, C.-T.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 義守大學 |
2010-11 |
Hardware implementation of triangulation method based on CORDIC algorithm
|
Yen-Chang Huang;Chien-Chang Lai;Yu-Jung Huang |
| 中華大學 |
2004 |
Hardware Implementation of Viterbi Decoder for WLAN 802.11a
|
陳棟洲; Chen, Tung-Chou |
| 臺大學術典藏 |
2005-12 |
Hardware oriented content-adaptive fast algorithm for variable block-size integer motion estimation in H.264
|
Chen, Yu-Han; Chen, Tung-Chien; Chen, Liang-Gee; Chen, Yu-Han; Chen, Tung-Chien; Chen, Liang-Gee |
| 國立臺灣大學 |
2005-12 |
Hardware oriented content-adaptive fast algorithm for variable block-size integer motion estimation in H.264
|
Chen, Yu-Han; Chen, Tung-Chien; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T05:15:47Z |
Hardware oriented content-adaptive fast algorithm for variable block-size integer motion estimation in H.264
|
Chen, Y.-H.; Chen, T.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2003-07 |
Hardware oriented rate control algorithm and implementation for realtime video coding
|
Fang, Hung-Chi; Wang, Tu-Chih; Chang, Yu-Wei; Chen, Liang-Gee; Fang, Hung-Chi; Wang, Tu-Chih; Chang, Yu-Wei; Chen, Liang-Gee |
| 國立臺灣大學 |
2003-07 |
Hardware oriented rate control algorithm and implementation for realtime video coding
|
Fang, Hung-Chi; Wang, Tu-Chih; Chang, Yu-Wei; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:27:46Z |
Hardware oriented rate control algorithm and implementation for realtime video coding
|
Fang, H.-C.; Wang, T.-C.; Chang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立中山大學 |
1999-11 |
Hardware realization of a bit-serial 16-bit multiplier using low-power high-speed FPGA logic module for DSP applications
|
C.C. Wang;C.J. Huang;H.L. Wu;H.M. Yang |
