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Showing items 553926-553935 of 2348487 (234849 Page(s) Totally)
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| 淡江大學 |
1993-12 |
Logic programs with conflict resolution = 邏輯程式中之矛盾解決
|
Horng, Wen-bing; 洪文斌; Yang, Chao-chih; 楊超植 |
| 國立交通大學 |
2014-12-08T15:03:45Z |
LOGIC SYNTHESIS FOR FIELD-PROGRAMMABLE GATE ARRAYS
|
HWANG, TT; OWENS, RM; IRWIN, MJ; WANG, KH |
| 國立臺灣大學 |
2009 |
Logic Synthesis in a Nutshell
|
Jiang, Jie-Hong R.; Devadas, Srinivas |
| 臺大學術典藏 |
2018-09-10T07:43:11Z |
Logic Synthesis in a Nutshell
|
Jie-Hong R. Jiang;Srinivas Devadas; Jie-Hong R. Jiang; Srinivas Devadas; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:12Z |
Logic Synthesis in a Nutshell
|
Jiang, J.H.;Devadas, S.; Jiang, J.H.; Devadas, S.; JIE-HONG JIANG |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;C.-C. Chi; C.-C. Chi; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
1994-01 |
Logic-Based Parsing of Chinese
|
陳信希; 陳信希 |
| 國立臺灣大學 |
1994-01 |
Logic-Based Parsing of Chinese
|
陳信希 |
| 國立臺灣大學 |
1991-06 |
Logic-based Temporal Inferences in Natural Languages
|
Lee, Hsiu-Hui; Lin, I-Peng; Wu, Chien-Ping |
| 國立交通大學 |
2017-04-21T06:49:12Z |
Logic/Memory Hybrid 3D Sequentially Integrated Circuit Using Low Thermal Budget Laser Process
|
Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Wu, Tsung-Ta; Wang, Hsing-Hsiang; Shen, Chang-Hong; Kao, Ming-Hsuan; Yeh, Wen-Kuan; Chang, Meng-Fan; Wu, Meng-Chyi; Shieh, Jia-Min |
Showing items 553926-553935 of 2348487 (234849 Page(s) Totally)
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