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Institution Date Title Author
元智大學 2017-05-23 Low-power Low-noise inductorless Front-end for IoT applications Yu-Chu Yang; Jeng-Rern Yang
元智大學 2017-05-23 Low-power Low-noise inductorless Front-end for IoT applications Yu-Chu Yang; Jeng-Rern Yang
臺大學術典藏 2018-09-10T06:20:27Z Low-power low-voltage direct digital frequency synthesizer Liao, Shyuan; Chen, Liang-Gee; LIANG-GEE CHEN
國立交通大學 2014-12-08T15:19:09Z Low-power low-voltage reference using peaking current mirror circuit Cheng, MH; Wu, ZW
國立成功大學 2016-06 Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications 邱瀝毅; CHIOU, LIH-YIH;Chien, Tsai-Kan;Sheu, Shyh-Shyuan;Lin, Jing-Cian;Lee, Chang-Chia;Ku, Tzu-Kun;Tsai, Ming-Jinn;Wu, Chih-I
國立成功大學 2016-06 Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications Chien, Tsai-Kan; Chiou, Lih-Yih; Sheu, Shyh-Shyuan; Lin, Jing-Cian; Lee, Chang-Chia; Ku, Tzu-Kun; Tsai, Ming-Jinn; Wu, Chih-I
臺大學術典藏 2018-09-10T15:33:45Z Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications Chien, T.; Chiou, L.; Sheu, S.; Lin, J.; Lee, C.; Ku, T.; Tsai, M.; Wu, C.; Chien, T.; Chiou, L.; Sheu, S.; Lin, J.; Lee, C.; Ku, T.; Tsai, M.; Wu, C.; CHIH-I WU
國立臺灣大學 2009 Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder Lin, Cheng-Hung; Chen, Chun-Yu; Tsai, Tsung-Han; Wu, An-Yeu
臺大學術典藏 2018-09-10T07:38:00Z Low-power memory-reduced traceback MAP decoding for double-binary convolutional turbo decoder Lin, C.-H.; Chen, C.-Y.; Wu, A.-Y.; Tsai, T.-H.; AN-YEU(ANDY) WU; Lin, C.-H.;Chen, C.-Y.;Wu, A.-Y.;Tsai, T.-H.
臺大學術典藏 2019-10-24T07:57:14Z Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder 吳安宇; AN-YEU(ANDY) WU; Tsung-Han Tsai; An-Yeu Wu; Chun-Yu Chen; Cheng-Hung Lin; 吳安宇;AN-YEU(ANDY) WU;Tsung-Han Tsai;An-Yeu Wu;Chun-Yu Chen;Cheng-Hung Lin
臺大學術典藏 2018-09-10T15:27:41Z Low-power microcontroller solution for measuring HBR using single reflection SpO2 Sensor Sun, C.-C. and Chun, K.-W. and Thai, T.T. and Yang, Y.-W.; YA-WEN YANG
臺大學術典藏 2020-09-30T01:17:18Z Low-power microcontroller solution for measuring HBR using single reflection SpO2 Sensor Sun C.-C.; Chun K.-W.; Thai T.T.; YA-WEN YANG
臺大學術典藏 2018-09-10T09:42:58Z Low-power multi-processor system architecture design for universal biomedical signal processing Cheng, L.-F.;Chen, T.-C.;Chen, L.-G.; Cheng, L.-F.; Chen, T.-C.; Chen, L.-G.; LIANG-GEE CHEN
國立高雄師範大學 2015-04-02 Low-Power Multi-Standard Viterbi Decoder for Wireless Communication Applications 鄭伯壎; C. Yu;B. S. Lin;Po-Hsun Cheng;Y. S. Su
中華大學 2009 Low-Power Multiplier Design with Row and Column Bypassing 顏金泰; YAN, JIN-TAI
中華大學 2006 Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters 宋志雲; Sung, Tze-Yun
中華大學 2006 Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters 謝曜式; Shieh, Yaw-Shih
國立交通大學 2014-12-08T15:35:28Z Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors Wang, Dao-Ping; Lin, Hon-Jarn; Chuang, Ching-Te; Hwang, Wei
國立臺灣大學 1998 Low-Power Multirate Architecture for IF Digital Frequency Down-Converter Shyh-Jye Jou; Shou-Yang Wu; 汪重光; Shyh-Jye Jou; Shou-Yang Wu; Wang, Chorng-Kuang
臺大學術典藏 2004-05 Low-power parallel tree architecture for full search block-matching motion estimation Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee; Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee
國立臺灣大學 2004-05 Low-power parallel tree architecture for full search block-matching motion estimation Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee
臺大學術典藏 2018-09-10T04:47:18Z Low-power parallel tree architecture for full search block-matching motion estimation Lin, S.-S.; Tseng, P.-C.; Chen, L.-G.; Lin, S.-S.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN
國立成功大學 2022-04 Low-Power Photodetectors Based on PVA-Modified Reduced Graphene Oxide Hybrid Solutions Shih;Yi-Shan;Li;Wei-Chen;Shen;Jun-Hao;Chu;Shao-Yu;Uen;Wu-Yih;Lee;Hsin-Ying;Lin;Gong-Ru;Chen;Yu-Cheng;Tu;Wei-Chen
國立臺灣科技大學 2019 Low-power photovoltaic energy harvesting with parallel differential power processing using a SEPIC Bagci, F.S.;Liu, Y.-C.;Kim, Kim K.A.
國立交通大學 2014-12-08T15:11:13Z Low-Power Programmable Pseudorandom Word Generator and Clock Multiplier Unit for High-Speed SerDes Applications Chen, Wei-Zen; Huang, Guan-Sheng

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