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Institution	Date	Title	Author
中華大學	2006	Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters	宋志雲; Sung, Tze-Yun
國立交通大學	2014-12-08T15:35:28Z	Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors	Wang, Dao-Ping; Lin, Hon-Jarn; Chuang, Ching-Te; Hwang, Wei
國立臺灣大學	1998	Low-Power Multirate Architecture for IF Digital Frequency Down-Converter	Shyh-Jye Jou; Shou-Yang Wu; 汪重光; Shyh-Jye Jou; Shou-Yang Wu; Wang, Chorng-Kuang
臺大學術典藏	2004-05	Low-power parallel tree architecture for full search block-matching motion estimation	Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee; Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee
國立臺灣大學	2004-05	Low-power parallel tree architecture for full search block-matching motion estimation	Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee
臺大學術典藏	2018-09-10T04:47:18Z	Low-power parallel tree architecture for full search block-matching motion estimation	Lin, S.-S.; Tseng, P.-C.; Chen, L.-G.; Lin, S.-S.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN
國立成功大學	2022-04	Low-Power Photodetectors Based on PVA-Modified Reduced Graphene Oxide Hybrid Solutions	Shih;Yi-Shan;Li;Wei-Chen;Shen;Jun-Hao;Chu;Shao-Yu;Uen;Wu-Yih;Lee;Hsin-Ying;Lin;Gong-Ru;Chen;Yu-Cheng;Tu;Wei-Chen
國立臺灣科技大學	2019	Low-power photovoltaic energy harvesting with parallel differential power processing using a SEPIC	Bagci, F.S.;Liu, Y.-C.;Kim, Kim K.A.
國立交通大學	2014-12-08T15:11:13Z	Low-Power Programmable Pseudorandom Word Generator and Clock Multiplier Unit for High-Speed SerDes Applications	Chen, Wei-Zen; Huang, Guan-Sheng
朝陽科技大學	2014-01-01	Low-Power Pulse-Triggered Flip-Flop Design Based on a Signal Feed-Through Scheme	林進發

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