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Institution Date Title Author
國立交通大學 2014-12-08T15:03:12Z Memory system design in superscalar processing Lu, NP; Chung, CP
國立交通大學 2019-04-02T05:59:24Z Memory system design in superscalar processing Lu, NP; Chung, CP
國立政治大學 2016-01 Memory updating and mental arithmetic 顏乃欣; Han, Cheng-Ching;Yang, TsungHan;Lin, Chia-Yuan;Yen, Nai-Shing
國立政治大學 2012-03 Memory updating capacity is the better predictor of multiplication performance than numerical acuity 顏乃欣;Han, C. C.;Yen, N. S.;Didino, D.;Butterworth, B
國立臺灣師範大學 2014-10-27T15:40:02Z Memory's Future Vilashini Cooppan
國立臺灣師範大學 2014-10-27T15:39:43Z Memory, Forgetting, and Joyce in the Third Millennium Lin, Yu-chen
國立中山大學 2005-07 Memory, Forgetting, and Joyce in the Third Millennium: Nationalism in the Era of Consumerism Yu-chen Lin
國立成功大學 2004 Memory, Repetition, and Aura: The Ecological Ethos in Joy Kogawa's Obasan Cook, Rufus Ernes
淡江大學 2013-08 Memory, Trauma and Nation: Contestation over the Batang Kali Massacre in Malaysia Leong, Kar Yen
國立交通大學 2014-12-16T06:15:42Z MEMORY-BASED FFT/IFFT PROCESSOR AND DESIGN METHOD FOR GENERAL SIZED MEMORY-BASED FFT PROCESSOR LEE, Chen-Yi; Hsiao, Chen-Fong; Chen, Yuan
國立交通大學 2014-12-16T06:14:06Z Memory-based FFT/IFFT processor and design method for general sized memory-based FFT processor Lee Chen-Yi; Hsiao Chen-Fong; Chen Yuan
國立高雄應用科技大學 1998-12 Memory-Based Function Approzimation Shieh, Chin-Shiuh;Pan, Jenq-Shyang
臺大學術典藏 2018-09-10T07:10:54Z Memory-Based Judgments: The Role of Information Typicality and Processing Ability Lien, Nai-Hwa;Douglas M. Stayman; Lien, Nai-Hwa; Douglas M. Stayman; NAI-HWA LIEN
實踐大學 2002 Memory-based sigma-pi-sigma neural network Li, C.K.
臺大學術典藏 2018-09-10T14:54:02Z Memory-based two-dimensional-parallel differential matched filter correlator for global navigation satellite system code acquisition Chen, C.-W.;Chen, S.-H.;Tsao, H.-W.;Mao, W.-L.; Chen, C.-W.; Chen, S.-H.; Tsao, H.-W.; Mao, W.-L.; HEN-WAI TSAO
中華大學 2006 Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation 宋志雲; Sung, Tze-Yun
中華大學 2006 Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation 謝曜式; Shieh, Yaw-Shih
中華大學 2006 Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter 宋志雲; Sung, Tze-Yun
中華大學 2006 Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter 謝曜式; Shieh, Yaw-Shih
中華大學 2006 Memory-Efficient and Fast Architectures for Forward and Inverse DCT with Multiplierless Operation 宋志雲; Sung, Tze-Yun
中華大學 2006 Memory-Efficient and Fast Architectures for Forward and Inverse DCT with Multiplierless Operation, 謝曜式; Shieh, Yaw-Shih
國立聯合大學 2007 Memory-Efficient and High-Performance 2-D DCT and IDCT Processors Based on CORDIC Rotation Tze-Yun Sung, Hsi-Chin Hsin
中華大學 2007 Memory-Efficient and High-Performance 2-D DCT and IDCT Processors Based on CORDIC Rotation 宋志雲; Sung, Tze-Yun
中華大學 2007 Memory-EfficiEnt and High-Performance 2-D DCT and IDCT Processors Based on CORDIC Rotation 宋志雲; Sung, Tze-Yun
國立聯合大學 2007 Memory-Efficient and High-Performance Parallel-Pipelined Architectures for 5/3 Forward and Inverse Discrete Wavelet Transform Tze-Yun Sung, Hsi-Chin Hsin

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