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Institution Date Title Author
國立臺灣大學 2006 Rounding Mismatch Between Spatial-Domain and Transform-Domain Video Codecs Wu, Ping-Hao; Chen, Chen; Chen, H.H.
臺大學術典藏 2018-09-10T05:59:06Z Rounding mismatch between spatial-domain and transform-domain video codecs HOMER H. CHEN; Wu, P.-H.; Chen, C.; Chen, H.H.
臺大學術典藏 2018-09-10T04:59:05Z Roundly Router Stamping: Detect and Mitigate DDoS Attacks C. Y. Huang,; C. L. Lei; CHIN-LAUNG LEI
國立聯合大學 2004 Roundness Errors in BTA Drillng and a Model of Waviness and Lobing caused by Resonant Forced Vibrations of its long Drill shaft C.S.Deng
國立交通大學 2014-12-08T15:38:46Z Roundness, errors in BTA drilling and a model of waviness and lobing caused by resonant forced vibrations of its long drill shaft Deng, CS; Chin, JH
臺大學術典藏 2020-12-22T05:29:13Z ROUNDTABLE discussion: "Peripatetic Objects and Transcultural Renaissances" CHING-FEI SHIH; CHING-FEI SHIH
佛光大學 2000-09-01 Rousseau in China《盧梭在中國》(ed.). 黃德偉
國立交通大學 2014-12-08T15:47:11Z Routability crossing distribution and floating pin assignment for T-type junction region Yan, JT
元智大學 2013-07 Routability optimization for crossbar-switch structured ASIC design Mei-Hsiang Tsai; Po-Yang Hsu; Hung-Yi Li; Yi-Huang Hung; Yi-Yu Liu
元智大學 2013-07 Routability optimization for crossbar-switch structured ASIC design Mei-Hsiang Tsai; Po-Yang Hsu; Hung-Yi Li; Yi-Huang Hung; Yi-Yu Liu
臺大學術典藏 2021-09-02T00:09:06Z Routability-Aware Pin Access Optimization for Monolithic 3D Designs* Wang R.-Y;Chang Y.-W.; Wang R.-Y; Chang Y.-W.; YAO-WEN CHANG
中華大學 2013 Routability-Constrained Multi-Bit Flip-Flop Construction for Clock Power Reduction 顏金泰; YAN, JIN-TAI
臺大學術典藏 2018-09-10T07:03:47Z Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs Jiang, Z.-W.; Su, B.-Y.; Chang, Y.-W.; YAO-WEN CHANG
臺大學術典藏 2018-09-10T08:42:37Z Routability-driven analytical placement for mixed-size circuit designs Hsu, M.-K.;Chou, S.;Lin, T.-H.;Chang, Y.-W.; Hsu, M.-K.; Chou, S.; Lin, T.-H.; Chang, Y.-W.; YAO-WEN CHANG
國立成功大學 2022 Routability-driven analytical placement with precise penalty models for large-scale 3D ICs Lin, J.-M.;Hsieh, Hsieh H.-Y.;Kung, H.;Lin, H.-J.
臺大學術典藏 2018-09-10T14:57:59Z Routability-driven blockage-aware macro placement Chen, Y.-F.;Huang, C.-C.;Chiou, C.-H.;Chang, Y.-W.;Wang, C.-J.; Chen, Y.-F.; Huang, C.-C.; Chiou, C.-H.; Chang, Y.-W.; Wang, C.-J.; YAO-WEN CHANG
國立交通大學 2015-07-21T08:30:53Z Routability-Driven Bump Assignment for Chip-Package Co-Design Chen, Meng-Ling; Tsai, Tu-Hsiung; Chen, Hung-Ming; Chen, Shi-Hao
中華大學 2010 Routability-Driven Flip-Flop Merging Process for Clock Power Reduction 顏金泰; YAN, JIN-TAI
國立成功大學 2021 Routability-driven Global Placer Target on Removing Global and Local Congestion for VLSI Designs Lin, J.-M.;Huang, C.-W.;Zane, L.-C.;Tsai, M.-C.;Lin, C.-L.;Tsai, C.-F.
國立臺灣科技大學 2019 Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model Huang, Y.-H.;Xie, Z.;Fang, G.-Q.;Yu, T.-C.;Ren, H.;Fang, S.-Y.;Chen, Y.;Hu, J.
國立成功大學 2019 Routability-driven mixed-size placement prototyping approach considering design hierarchy and indirect connectivity between macros Lin, J.-M.;Li, S.-T.;Wang, Y.-T.
國立成功大學 2023 Routability-Driven Orientation-Aware Analytical Placement for System in Package Lin, J.-M.;Tsai, Tsai T.-C.;Shen, R.-T.
中華大學 2010 Routability-driven partitioning-based IO assignment for flip-chip designs 顏金泰; YAN, JIN-TAI
臺大學術典藏 2018-09-10T09:48:07Z Routability-driven placement for hierarchical mixed-size circuit designs Hsu, M.-K.;Chen, Y.-F.;Huang, C.-C.;Chen, T.-C.;Chang, Y.-W.; Hsu, M.-K.; Chen, Y.-F.; Huang, C.-C.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG
中華大學 2010 Routability-Driven RDL Routing with Pin Reassignment 顏金泰; YAN, JIN-TAI

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