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Showing items 806086-806095 of 2348419 (234842 Page(s) Totally)
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| 大葉大學 |
2010-06-1 |
System-level performance analysis of proton exchange membrane fuel cell system
|
Tsai, Huan-Liang |
| 臺大學術典藏 |
2018-09-10T15:21:13Z |
System-level performance and power optimization for MPSoC: A memory access-aware approach
|
Lin, Y.-J.;Yang, C.-L.;Huang, J.-W.;Lin, T.-J.;Hsueh, C.-W.;Chang, N.; Lin, Y.-J.; Yang, C.-L.; Huang, J.-W.; Lin, T.-J.; Hsueh, C.-W.; Chang, N.; CHIA-LIN YANG |
| 臺大學術典藏 |
2020-05-04T07:48:21Z |
System-Level Performance and Power Optimization for MPSoC: A Memory Access-Aware Approach
|
Lin, Ye-Jyun;Yang, Chia-Lin;Huang, Jiao-We;Lin, Tay-Jyi;Hsueh, Chih-Wen;Chang, Naehyuck; Lin, Ye-Jyun; Yang, Chia-Lin; Huang, Jiao-We; Lin, Tay-Jyi; Hsueh, Chih-Wen; Chang, Naehyuck; CHIH-WEN HSUEH |
| 臺大學術典藏 |
2011 |
System-level requirements for implementing wide dynamic range pulse-modulated polar transmitters
|
Chen, J.-H.; Lin, H.-C.; Lin, H.-C.;Chen, J.-H. |
| 國立臺灣大學 |
2011 |
System-level requirements for implementing wide dynamic range pulse-modulated polar transmitters
|
Lin, H.-C.; Chen, J.-H. |
| 臺大學術典藏 |
2020-01-17T07:44:53Z |
System-level requirements for implementing wide dynamic range pulse-modulated polar transmitters
|
Chen, J.-H.; JAU-HORNG CHEN; Lin, H.-C.; JAU-HORNG CHEN;Chen, J.-H.;Lin, H.-C. |
| 國立交通大學 |
2014-12-08T15:24:49Z |
System-level veri cation on high-level synthesis of dataflow graph
|
Chiang, Tsung-Hsi; Dung, Lan-Rong |
| 國立暨南國際大學 |
2010 |
System-on-Chip Architecture for Speech Recognition
|
郭桂廷?; Kuo, KT |
| 國立暨南國際大學 |
2010 |
System-on-Chip Architecture for Speech Recognition
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吳俊德?; Wu, GD |
| 國立中山大學 |
2005-10 |
System-on-Chip Implementation of the Whole Advanced Encryption Standard (AES) Processor Using Reduced XOR-based Sum-of-Product Operations
|
Shen-Fu Hsiao;Ming-Chih Chen;Ming-Yu Tsai;Chi-Chen Lin |
Showing items 806086-806095 of 2348419 (234842 Page(s) Totally)
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