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Institution	Date	Title	Author
臺大學術典藏	2021-02-26T08:42:04Z	A 1.5£gJ/Task Path-Planning Processor for 2D/3D Autonomous Navigation of Micro Robots	Chung, C.; Yang, C.-H.; CHIA-HSIANG YANG
國立臺灣大學	2008	A 1.5–9.6 GHz Monolithic Active Quasi-Circulator in 0.18μm CMOS Technology	Shin, Shih-Chieh; Huang, Jhih-Yu; Lin, Kun-You; Wang, Huei
國立成功大學	2021	A 1.6-Gs/s 8b flash-SAR time-interleaved ADC with top-plate residue based gain calibration	Hsu, C.-W.;Chang, S.-J.
臺大學術典藏	2018-09-10T08:18:16Z	A 1.62/2.7-Gb/s adaptive transmitter with two-tap preemphasis using a propagation-time detector	Shih-Yuan Kao;Shen-Iuan Liu; Shih-Yuan Kao; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏	2021-11-21T23:19:02Z	A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS	Liu, Yu Tung; Kung, Chu King; Hsieh, Ming Hang; Wang, Hsiu Wen; CHUN-PIN LIN; Yu, Chao Yang; Chen, Chi Shi; TZI-DAR CHIUEH
臺大學術典藏	2022-02-21T23:30:47Z	A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS	Liu, Yu Tung; Kung, Chu King; Hsieh, Ming Hang; Wang, Hsiu Wen; CHUN-PIN LIN; Yu, Chao Yang; Chen, Chi Shi; TZI-DAR CHIUEH
國立交通大學	2014-12-08T15:41:18Z	A 1.69 Gb/s Area-Efficient AES Crypto Core with Compact On-the-fly Key Expansion Unit	Liu, Po-Chun; Chang, Hsie-Chia; Lee, Chen-Yi
元智大學	2009-06	A 1.7-mW, 14.4% Frequency Tuning, 24GHz VCO with Current-Reused Structure Using 0.18-um CMOS Technology	蔡政翰; Yen-Hung Kuo; Tian-Wei Huang
元智大學	2009-06	A 1.7-mW, 14.4% Frequency Tuning, 24GHz VCO with Current-Reused Structure Using 0.18-um CMOS Technology	蔡政翰; Yen-Hung Kuo; Tian-Wei Huang
國立臺灣師範大學	2014-10-30T09:28:46Z	A 1.7-mW, 14.4% Frequency Tuning,24GHz VCO with Current-Reused Structure Using 0.18-μm CMOS Technology	Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang

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