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Institution	Date	Title	Author
中華大學	2006	VLSI Implementation of CORDIC-Based Geometry Rotation for High-Speed 3-D Computer Graphic Systems	宋志雲; Sung, Tze-Yun
國立中山大學	1997-06	VLSI Implementation of Digit-On-Line CORDIC with Constant Scaling Factor	Shen-Fu Hsiao; Jen-Yin Chen
中華大學	2008	VLSI Implementation of Discrete Wavelet Transform with Lifting Scheme	宋志雲; Sung, Tze-Yun
中華大學	2006	VLSI Implementation of Double- Rotation CORDIC Arithmetic	謝曜式; Shieh, Yaw-Shih
中華大學	2006	VLSI Implementation of Double- Rotation CORDIC Arithmetic (DRCA)	宋志雲; Sung, Tze-Yun
國立中山大學	1994-12	VLSI Implementation of Fully Pipelined Hadamard Transform	Shen-Fu Hsiao; Vincent Tsai
中華大學	2006	VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors	宋志雲; Sung, Tze-Yun
中華大學	2006	VLSI Implementation of High-Efficient 2-D Lifting-Based DWT and IDWT Processors	謝曜式; Shieh, Yaw-Shih
國立聯合大學	2007	VLSI Implementation of High-Performance CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphic Systems	Tze-Yun Sung, Hsi-Chin Hsin
中華大學	2007	VLSI Implementation of High-Performance CORDIC-Based Vector Interpolator in Power-Aware 3-D Graphic Systems	宋志雲; Sung, Tze-Yun
國立成功大學	2004-06	VLSI implementation of implantable wireless power and data transmission micro-stimulator for neuromuscular stimulation	Lee, Shuenn-Yuh; Lev, Shyh-Chyang; Chen, Jia-Jin Jason
中華大學	2013	VLSI IMPLEMENTATION OF LOW-POWER AND HIGH-SFDR DIGITAL FREQUENCY SYNTHESIZER FOR UNDERWATER INSTRUMENTS AND NETWORK SYSTEMS	莊英慎; Juang, Ying-Shen
中華大學	2013	VLSI IMPLEMENTATION OF LOW-POWER AND HIGH-SFDR DIGITAL FREQUENCY SYNTHESIZER FOR UNDERWATER INSTRUMENTS AND NETWORK SYSTEMS	宋志雲; Sung, Tze-Yun
國立高雄第一科技大學	2006.04	VLSI implementation of low-power high-quality color interpolation processor for CCD camera	Hsia, Shih-Chang;Chen, Ming-Huei;Tsai, Po-Shien
中華大學	2006	VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors	宋志雲; Sung, Tze-Yun
中華大學	2006	VLSI Implementation of Memory-Efficiency Multiplierless DCT and IDCT Processors	謝曜式; Shieh, Yaw-Shih
國立中山大學	1995-12	VLSI implementation of multi-valued exponential bidirectional associative memory using current-mode circuits	C.C. Wang;Y.C. Chen
中華大學	2005	VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion	宋志雲; Sung, Tze-Yun
中華大學	2005	VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion	謝曜式; Shieh, Yaw-Shih
中華大學	2005	VLSI Implementation of Pipelined Architectures for 2-D Discrete Wavelet Transform and Its Inversion	林國珍; Lin, Kuo-Jen
臺大學術典藏	2018-09-10T09:48:39Z	VLSI implementation of real-time motion compensated beamforming in synthetic transmit aperture imaging	Ho, K.-Y.;Chen, Y.-H.;Zhan, C.-Z.;y Wu, A.-Y.; Ho, K.-Y.; Chen, Y.-H.; Zhan, C.-Z.; y Wu, A.-Y.; AN-YEU(ANDY) WU
臺大學術典藏	2018-09-10T04:07:51Z	VLSI implementation of shape-adaptive discrete wavelet transform	Tseng, P.-C.; Huang, C.-T.; Chen, L.-G.; LIANG-GEE CHEN
臺大學術典藏	2018-09-10T06:54:39Z	VLSI implementation of the motion estimator with two-dimensional data-reuse	Lai, Y.-K.; Lai, Y.-L.; Liu, Y.-C.; Chen, L.-G.; LIANG-GEE CHEN
國立中山大學	1998-02	VLSI Implementation of the Quadratic-Spline W-Transform for Multi-resolution Image Processing	Shen-Fu Hsiao
國立聯合大學	2004	VLSI Implementation of the Universal 2-D CAT/ICAT System (EI)	陳榮堅, 賴瑞麟
國立臺灣大學	1999-06	VLSI Implementation of Timing Recovery and Carrier Recovery for QAM/VSB Dual Mode	Shyh-Jye; Kua, G. H.; Shiue, Muh-Tian; Heh, Jung-Yu; 汪重光; Shyh-Jye; Kua, G. H.; Shiue, Muh-Tian; Heh, Jung-Yu; Wang, C. K.
臺大學術典藏	2018-09-10T06:54:39Z	VLSI implementation of visual block pattern truncation coding	Liu, Y.-C.; Lai, Y.-K.; Tsai, T.-H.; Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN
國立中山大學	1994-08	VLSI Implementations of an Error-Correcting Encoder/Decoder	Shen-Fu Hsiao
元智大學	2017-07-02	VLSI implementations of parallel dual-mode MAP decoding for iterative detection and decoding receiver	Ching-Wen Hsieh; Cheng-Hung Lin
國立中山大學	1997-12	VLSI implemnetation of a word-slice pipelined maximum selector for priority queues	C.C. Wang;G.C. Lin
國立交通大學	2014-12-08T15:04:36Z	VLSI NEUROPROCESSORS FOR VIDEO MOTION DETECTION	LEE, JC; SHEU, BJ; FANG, WC; CHELLAPPA, R
臺大學術典藏	2018-09-10T07:44:18Z	VLSI Process Control	RUEY-SHAN GUO;K. Wong;A. Hu;S. Ha;E. Sachs; RUEY-SHAN GUO; K. Wong; A. Hu; S. Ha; E. Sachs; RUEY-SHAN GUO
中華大學	2009	VLSI Reconfigurable Architecture for 9/7-5/3 Lifting-Based Discrete Wavelet Transform	宋志雲; Sung, Tze-Yun
臺大學術典藏	2021-12-14T23:12:45Z	VLSI Structure-aware Placement for Convolutional Neural Network Accelerator Units	Chou, Yun; Hsu, Jhih Wei; YAO-WEN CHANG; Chen, Tung Chieh
國立交通大學	2014-12-16T08:14:56Z	VLSI technology	Sze, S M
臺大學術典藏	2018-09-10T06:03:19Z	VLSI Test Principles and Architectures	CHIEN-MO LI; et. al.; Wen; Wu; Wang
南台科技大學	2005-05	VLSI 實現低複雜度MPEG-4 Simple Profile 編碼系統於嵌入式處理器之SoC 平台	許雲淳; 陳順智; 陳培殷
大葉大學	2007-01-30	VLSI 測試技術之研究	陳建基, 鍾翼能
南台科技大學	1999	VLSI 設計流程整合實務	王立洋; 唐經洲
國立交通大學	2014-12-12T02:04:24Z	VLSI 陣列編譯器之設計與實現	黃柏川; HUANG, BO-CHUAN; 任建葳; REN, JIAN-WEI
國立交通大學	2014-12-12T02:04:46Z	VLSI 陣列編譯器之設計與實現	黃柏川; Huang, Bo-Chuan; 任建葳; Ren, Jian-Wei
臺大學術典藏	2018-09-10T05:15:50Z	VLSI-based array dividers with concurrent error detection	Chen, T.-H.; Lee, Y.-P.; Chen, L.-G.; LIANG-GEE CHEN
國立交通大學	2014-12-12T02:12:11Z	VLSI可靠性中由熱載子產生氧化層傷害的模式與模擬	蘇振順; jen-Shien Su; 莊紹勳; Steve S. Chung
南台科技大學	2005	VLSI實現低複雜度MPEG-4 Simple Profile編碼系統於嵌入式處理器之SoC平台	許雲淳; Yun-Chun Xu
國立交通大學	2014-12-12T02:02:56Z	VLSI微影技術--晶片步進機之最佳曝光條件	許金榮; XU, JIN-RONG; 李亞君; LI, YA-JUN
國立交通大學	2014-12-12T02:03:23Z	VLSI微影技術--晶片步進機之最佳曝光條件	許金榮; Xu, Jin-Rong; 李亞君; Li, Ya-Jun
國立彰化師範大學	2005	VLSI教改推課計畫	黃宗柱
國立彰化師範大學	2006	VLSI教改推課計畫	黃宗柱
國立彰化師範大學	2004	VLSI教育改革計畫之快速雛型設計與VLSI設計	黃宗柱
國立彰化師範大學	2001	VLSI教育改革計畫之快速雛型設計與單晶片應用之整合研究	黃宗柱

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