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Institution	Date	Title	Author
國立臺灣大學	2002	A 2.17 dB NF, 5 GHz Band Monolithic CMOS LNA with 10 mW DC Power Consumption	Chiu, Hong-Wei; Lu, Shey-Shi
臺大學術典藏	2018-09-10T08:15:38Z	A 2.17 mm2 125 mW reconfigurable SVD chip for IEEE 802.11n system	Chen, Y.-L.;Jheng, T.-J.;Zhan, C.-Z.;Wu, A.-Y.; Chen, Y.-L.; Jheng, T.-J.; Zhan, C.-Z.; Wu, A.-Y.; AN-YEU(ANDY) WU
國立臺灣大學	2005-03	A 2.17-dB NF 5-GHz-Band Monolithic CMOS LNA With 10-mW DC Power Consumption	Chiu, Hung-Wei; Lu, Shey-Shi; Lin, Yo-Sheng
國立暨南國際大學	2005	A 2.17-dB NF 5-GHz-band monolithic CMOS LNA with 10-mW DC power consumption?	林佑昇; Lin, YS
國立交通大學	2020-10-05T02:01:08Z	A 2.17-mW Acoustic DSP Processor With CNN-FFT Accelerators for Intelligent Hearing Assistive Devices	Lee, Yu-Chi; Chi, Tai-Shih; Yang, Chia-Hsiang
臺大學術典藏	2021-02-26T08:42:03Z	A 2.17-mw acoustic dsp processor with cnn-fft accelerators for intelligent hearing assistive devices	Lee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG
國立交通大學	2019-12-13T01:12:51Z	A 2.17mW Acoustic DSP Processor with CNN-FFT Accelerators for Intelligent Hearing Aided Devices	Lee, Yu-Chi; Chi, Tai-Shih; Yang, Chia-Hsiang
臺大學術典藏	2020-06-11T06:50:59Z	A 2.17mW Acoustic DSP Processor with CNN-FFT Accelerators for Intelligent Hearing Aided Devices	Lee, Y.-C.;Chi, T.-S.;Yang, C.-H.; Lee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG
國立高雄師範大學	2004-08	A 2.2 GHz Programmable DLL-Based Frequency Multiplier for SOC Applications	Kuo-Hsing Cheng;Shu-Ming Chang;Yu-Lung Lo;Shu-Yu Jiang; 羅有龍
國立交通大學	2017-04-21T06:55:46Z	A 2.2 mu W,-12 dBm RF-Powered Wireless Current Sensing Readout Interface IC With Injection-Locking Clock Generation	Lin, Fu-To; Lu, Shao-Yung; Liao, Yu-Te

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