|
English
|
正體中文
|
简体中文
|
Total items :0
|
|
Visitors :
51922189
Online Users :
1349
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
|
|
|
|
Taiwan Academic Institutional Repository >
Browse by Title
|
Showing items 918061-918070 of 2348406 (234841 Page(s) Totally)
<< < 91802 91803 91804 91805 91806 91807 91808 91809 91810 91811 > >>
View [10|25|50] records per page
| 國立高雄第一科技大學 |
2012.05 |
Wafer Identification Recognition by Stroke Analysis and Template Matching
|
Hsu, Wei-Chih;Yu, Tsan-Ying;Chen, Kuan-Liang |
| 國立交通大學 |
2017-04-21T06:49:36Z |
Wafer Level Batch Fabrication and Assembly of Small Form Factor Optical Pickup Head
|
Hsiao, Sheng-Yi; Lee, Chih-Chun; Chiu, Yi; Shih, Hsi-Fu; Chiou, Jin-Chem; Shieh, Han-Ping D.; Fang, Weileun |
| 中華大學 |
2007 |
Wafer Level MEMS Vertical Probe Card Design
|
林君明; Lin, Jium-Ming |
| 國立交通大學 |
2014-12-16T06:14:01Z |
Wafer level packaging method and a packaging structure using thereof
|
Chen Tsung-Lin; Lien Jui-Chien |
| 中華大學 |
2008 |
Wafer Level Test Vertical Probe Design
|
林君明; Lin, Jium-Ming |
| 元智大學 |
2010-11 |
WAFER LITHOGRAPHIC MASK AND WAFER LITHOGRAPHY METHOD USING THE SAME
|
Shih-Cheng Tsai; Lin R.-B. |
| 元智大學 |
2010-11 |
WAFER LITHOGRAPHIC MASK AND WAFER LITHOGRAPHY METHOD USING THE SAME
|
Shih-Cheng Tsai; Lin R.-B. |
| 朝陽科技大學 |
2006-05 |
Wafer lot output time prediction with a hybrid artificial neural network
|
吳欣潔; Tsai, H.R.; Wu, H.C.; Chen, T. |
| 臺大學術典藏 |
2018-09-10T15:21:11Z |
Wafer map failure pattern recognition and similarity ranking for large-scale data sets
|
Wu, M.-J.;Jang, J.-S.R.;Chen, J.-L.; Wu, M.-J.; Jang, J.-S.R.; Chen, J.-L.; JYH-SHING JANG |
| 國立交通大學 |
2014-12-08T15:43:46Z |
Wafer rework strategies at the photolithography stage
|
Sha, DY; Hsieh, LF; Chen, KJ |
Showing items 918061-918070 of 2348406 (234841 Page(s) Totally)
<< < 91802 91803 91804 91805 91806 91807 91808 91809 91810 91811 > >>
View [10|25|50] records per page
|
