English  |  正體中文  |  简体中文  |  Total items :2875227  
Visitors :  54097150    Online Users :  469
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

Jump to: [ Chinese Items ] [ 0-9 ] [ A B C D E F G H I J K L M N O P Q R S T U V W X Y Z ]
or enter the first few letters:   

Showing items 919111-919135 of 2351361  (94055 Page(s) Totally)
<< < 36760 36761 36762 36763 36764 36765 36766 36767 36768 36769 > >>
View [10|25|50] records per page

Institution Date Title Author
國立臺灣海洋大學 2009-12 Wafer Defect Inspection by Neural Analysis of Region Features Chuan-Yu Chang; Chun-Hsi Li; Yung-Chi Chang; MuDer Jeng
國立交通大學 2014-12-08T15:09:01Z Wafer defect pattern recognition by multi-class support vector machines by using a novel defect cluster index Chao, Li-Chang; Tong, Lee-Ing
國立高雄第一科技大學 2012.05 Wafer Identification Recognition by Stroke Analysis and Template Matching Hsu, Wei-Chih;Yu, Tsan-Ying;Chen, Kuan-Liang
國立交通大學 2017-04-21T06:49:36Z Wafer Level Batch Fabrication and Assembly of Small Form Factor Optical Pickup Head Hsiao, Sheng-Yi; Lee, Chih-Chun; Chiu, Yi; Shih, Hsi-Fu; Chiou, Jin-Chem; Shieh, Han-Ping D.; Fang, Weileun
中華大學 2007 Wafer Level MEMS Vertical Probe Card Design 林君明; Lin, Jium-Ming
國立交通大學 2014-12-16T06:14:01Z Wafer level packaging method and a packaging structure using thereof Chen Tsung-Lin; Lien Jui-Chien
中華大學 2008 Wafer Level Test Vertical Probe Design 林君明; Lin, Jium-Ming
元智大學 2010-11 WAFER LITHOGRAPHIC MASK AND WAFER LITHOGRAPHY METHOD USING THE SAME Shih-Cheng Tsai; Lin R.-B.
元智大學 2010-11 WAFER LITHOGRAPHIC MASK AND WAFER LITHOGRAPHY METHOD USING THE SAME Shih-Cheng Tsai; Lin R.-B.
朝陽科技大學 2006-05 Wafer lot output time prediction with a hybrid artificial neural network 吳欣潔; Tsai, H.R.; Wu, H.C.; Chen, T.
臺大學術典藏 2018-09-10T15:21:11Z Wafer map failure pattern recognition and similarity ranking for large-scale data sets Wu, M.-J.;Jang, J.-S.R.;Chen, J.-L.; Wu, M.-J.; Jang, J.-S.R.; Chen, J.-L.; JYH-SHING JANG
國立交通大學 2014-12-08T15:43:46Z Wafer rework strategies at the photolithography stage Sha, DY; Hsieh, LF; Chen, KJ
中原大學 2002-03-26 Wafer rinse tank for metal etching and method for using 陳志吉;鍾子揚;王思堯;潘昇良
國立交通大學 2017-04-21T06:56:39Z Wafer Scale Phase-Engineered 1T-and 2H-MoSe2/Mo Core-Shell 3D-Hierarchical Nanostructures toward Efficient Electrocatalytic Hydrogen Evolution Reaction Qu, Yindong; Medina, Henry; Wang, Sheng-Wen; Wang, Yi-Chung; Chen, Chia-Wei; Su, Teng-Yu; Manikandan, Arumugam; Wang, Kuangye; Shih, Yu-Chuan; Chang, Je-Wei; Kuo, Hao-Chung; Lee, Chi-Yung; Lu, Shih-Yuan; Shen, Guozhen; Wang, Zhiming M.; Chueh, Yu-Lun
國立交通大學 2018-08-21T05:56:49Z WAFER SIZE MOS2 WITH FEW MONOLAYER SYNTHESIZED BY H2S SULFURIZATION Ho, Yen-Teng; Chu, Yung-Ching; Wei, Lin-Lung; Luong, Tien-Tung; Lin, Chih-Chien; Cheng, Chun-Hung; Hsu, Hung-Ru; Tu, Yung-Yi; Chang, Edward Yi
國立交通大學 2014-12-08T15:47:47Z Wafer Sort Bitmap Data Analysis Using the PCA-Based Approach for Yield Analysis and Optimization Hsieh, Yeou-lang; Tzeng, Gwo-hshiung; Lin, T. R.; Yu, Hsiao-cheng
國立彰化師範大學 2000-04 Wafer-Bonded AlGaInP/Au/AuBe/SiO2/Si Light-Emitting Diodes Horng, Ray-Hua; Wuu, Dong-Sing; Wei, Sun-Chin; Tseng, Chung-Yang; Huang, Man-Fang; Chang, Kuo-Hsiung; Liu, Pin-Hui; Lin, Kun-Chuan
國立彰化師範大學 1999 Wafer-bonded InGaAlP/AuBe/glass Light-emitting Diodes Horng, R. H. ; Wuu, D. S. ; Tseng, H. W. ; Wei, S. C. ; Huang, Man-Fang; Chang, K. H. ; Liu, P. H. ; Lin, K. C.
國立交通大學 2014-12-08T15:20:30Z WAFER-LEVEL CHIP SCALE FLEXIBLE WIRELESS MICROSYSTEM FABRICATION Chao, Tzu-Yuan; Cheng, Y. T.
國立交通大學 2014-12-08T15:21:23Z Wafer-level Cu-Cu bonding technology Tang, Ya-Sheng; Chang, Yao-Jen; Chen, Kuan-Neng
國立交通大學 2017-04-21T06:49:09Z Wafer-Level MOSFET with Submicron Photolysis Polymer Temporary Bonding Technology Using Ultra-Fast Laser Ablation for 3DIC Application Cheng, Chuan-An; Huang, Yu-Hsiang; Lin, Chicn-Hung; Lee, Chia-Lin; Yang, Shan-Chun; Chen, Kuan-Neng
國立交通大學 2014-12-08T15:38:24Z Wafer-Level Self-Aligned Nano Tubular Structures and Templates for Device Applications Chen, K. N.; Arnold, J. C.
國立交通大學 2014-12-08T15:21:13Z Wafer-level three-dimensional integrated circuits (3D IC): Schemes and key technologies Lai, Ming-Fang; Li, Shih-Wei; Shih, Jian-Yu; Chen, Kuan-Neng
臺大學術典藏 2018-09-10T18:04:51Z Wafer-scale bioactive substrate patterning by chemical lift-off lithography Chen, Chong-You;Wang, Chang-Ming;Li, Hsiang-Hua;Chan, Hong-Hseng;Liao, Wei-Ssu; Chen, Chong-You; Wang, Chang-Ming; Li, Hsiang-Hua; Chan, Hong-Hseng; Liao, Wei-Ssu; WEI-SSU LIAO
國立成功大學 2024-01-25 Wafer-Scale Fabrication of Al/MoS2/Poly-Si Memristors and Insight of Mechanism on the Resistive Switching Li;Kuan-Sheng;Huang;Min-Kun;Wang;Yeong-Her;Tseng;Yuan-Chieh;Su;Chun-Jung

Showing items 919111-919135 of 2351361  (94055 Page(s) Totally)
<< < 36760 36761 36762 36763 36764 36765 36766 36767 36768 36769 > >>
View [10|25|50] records per page