| 元智大學 |
2012-04-19 |
FPGA Implementation of Alamouti MIMO Log-Likelihood Ratio Selection for Receiver-Antenna Selection Combining
|
Peiwang Chow; Yawgeng Chau; Guangliang Ren |
| 元智大學 |
2004-08 |
FPGA Implementation of an All-Digital T/2-Spaced QPSK Receiver with Farrow Interpolation Timing Synchronizer and Recursive Costas Loop
|
黃正光; C. H. Chu |
| 元智大學 |
2004-08 |
FPGA Implementation of an All-Digital T/2-Spaced QPSK Receiver with Farrow Interpolation Timing Synchronizer and Recursive Costas Loop
|
黃正光; C. H. Chu |
| 國立臺灣科技大學 |
2015 |
FPGA implementation of automatic speech recognition system in a car environment
|
Syu, D.-F;Syu, Syu S.-W;Ruan, S.-J;Huang, Y.-C;Yang, C.-K. |
| 國立臺灣科技大學 |
2016 |
FPGA implementation of automatic speech recognition system in a car environment
|
Syu, D.-F;Syu, Syu S.-W;Ruan, S.-J;Huang, Y.-C;Yang, C.-K. |
| 國立交通大學 |
2018-08-21T05:56:43Z |
FPGA Implementation of EEG System-on-Chip with Automatic Artifacts Removal based on BSS-CCA Method
|
Chou, Chia-Ching; Chen, Tsan-Yu; Fang, Wai-Chi |
| 南台科技大學 |
2005-06 |
FPGA Implementation of FIR Filter with smallest Processor
|
魏兆煌; C.H. Wei ; H.C. Hsiao ; S.W. Tsai |
| 中華大學 |
2011 |
FPGA Implementation of High Performance DCT/IDCT Processor
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2011 |
FPGA Implementation of High Performance DCT/IDCT Processor
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2005 |
FPGA Implementation of High-Speed 3-D Graphic Engine Using Double Rotation CORDIC Algorithm
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
FPGA Implementation of Image Scalar for LCD Monitor and TV Controller
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
FPGA Implementation of Image Scalar for LCD Monitor and TV Controller
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2005 |
FPGA Implementation of Image Scalar for LCD Monitor and TV Controller
|
林國珍; Lin, Kuo-Jen |
| 元智大學 |
Feb-19 |
FPGA Implementation of Lifting-Based Data Hiding Scheme for Efficient Quality Access Control of Images
|
Amit Phadikar; Goutam Kumar Maity; Tien-Lung Chiu; Himadri Mandal |
| 國立臺灣師範大學 |
2019-08-29T07:59:17Z |
FPGA implementation of music retrieval systems based on NIOSⅡ processor
|
葉哲宇 |
| 義守大學 |
2017-10 |
FPGA implementation of neuron block for artificial neural network
|
ZhaoFang Li;Yu-Jung Huang;Wei-Cheng Lin |
| 國立交通大學 |
2019-04-02T06:04:48Z |
FPGA Implementation of OFDM Baseband Processor
|
Sung, Kuohua; Hsu, Terng-Yin |
| 朝陽科技大學 |
2021-12 |
FPGA implementation of random number generator using LFSR and scrambling algorithm for lightweight cryptography
|
Poojari, Asmita;Nagesh, H R |
| 元智大學 |
2012-02 |
FPGA Implementation of SDR based CFO Estimation and Compensation Circuit for OFDM System
|
Jeich Mar; Chi-Cheng Kuo; Shih-Hao Chou |
| 淡江大學 |
2014 |
FPGA implementation of Takagi-Sugeno fuzzy cerebellar model articulation volume control
|
陳彥融; Chen, Yen-Jung |
| 國立東華大學 |
2010-04 |
FPGA implementation of the FIR filter using the M-bit parallel distributed arithmetic
|
陳俊全; Chen, Chun-Chyuan; Jeng, Shiann-Shiun ;Lin, Hsing-Chen ;Chang, Shu-Ming |
| 國立臺灣科技大學 |
2015 |
FPGA implementation of vision-based fingertip-writing digits recognition system
|
Shih, C.-L;Yang, B.-L;Lee, W.-Y;Chen, T.-H;Chen, B.-J;Fan, Y.-C. |
| 國立臺灣科技大學 |
2016 |
FPGA implementation of vision-based fingertip-writing digits recognition system
|
Shih, C.-L;Yang, B.-L;Lee, W.-Y;Chen, T.-H;Chen, B.-J;Fan, Y.-C. |
| 國立臺灣科技大學 |
2017 |
FPGA of bias-free distorters RF power amplifiers and front ends design for computational intelligence applications
|
Lai, W.-C;Su, Y.-J. |
| 臺大學術典藏 |
2019-04-22T05:22:39Z |
FPGA placement and routing
|
Chen, S.-C.;Chang, Y.-W.; Chen, S.-C.; Chang, Y.-W. |
