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显示项目 445681-445705 / 2348609 (共93945页)
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机构 日期 题名 作者
臺大學術典藏 2018-09-10T07:41:37Z Gate Tunneling Leakage Current Behavior of 40nm PD SOI NMOS Device Considerign the Floating Body Effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
國立高雄師範大學 2010 Gate voltage swing enhancement of an InGaP/InGaAs pseudomorphic HFET with low-to-high double doping channels Jung-Hui Tsai;Wen-Shiung Lour;Chia-Hua Huang;Sheng-Shiun Ye;Yung-Chun Ma; 蔡榮輝
國立臺灣海洋大學 2010-10-28 Gate voltage swing enhancement of InGaP/ InGaAs pseudomorphic HFET with low-to-high double doping channels J.-H. Tsai; W.-S. Lour; C.-H. Huang; S.-S. Ye; Y.-C. Ma
臺大學術典藏 2018-09-10T07:04:10Z Gate width dependence on backscattering characteristics in the nanoscale strained complementary metal-oxide-semiconductor field-effect transistor Liao, M.H.; Liu, C.W.; Yeh, L.; Lee, T.-L.; Liang, M.-S.; CHEE-WEE LIU
臺大學術典藏 2020-01-13T08:22:40Z Gate width dependence on backscattering characteristics in the nanoscale strained complementary metal-oxide-semiconductor field-effect transistor Liao, M.H.; Liu, C.W.; Yeh, L.; Lee, T.-L.; Liang, M.-S.; MING-HAN LIAO
國立交通大學 2014-12-08T15:36:25Z Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels Tsai, Jung-Ruey; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan
臺大學術典藏 2018-09-10T14:58:05Z Gate-all-around Ge FETs Liu, C.W.;Chen, Y.-T.;Hsu, S.-H.; Liu, C.W.; Chen, Y.-T.; Hsu, S.-H.; CHEE-WEE LIU
國立交通大學 2014-12-08T15:11:50Z Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels Su, Chun-Jung; Tsai, Tzu-I; Liou, Yu-Ling; Lin, Zer-Ming; Lin, Horng-Chih; Chao, Tien-Sheng
國立交通大學 2015-12-02T02:59:20Z Gate-all-around poly-Si nanowire junctionless thin-film transistors with multiple channels Tso, Chia-Tsung; Liu, Tung-Yu; Sheu, Jeng-Tzong
國立交通大學 2014-12-08T15:27:28Z Gate-All-Around Poly-Si TFTs With Single-Crystal-Like Nanowire Channels Kang, Tsung-Kuei; Liao, Ta-Chuan; Lin, Chia-Min; Liu, Han-Wen; Wang, Fang-Hsing; Cheng, Huang-Chung
國立交通大學 2014-12-08T15:22:22Z Gate-all-around polycrystalline-silicon thin-film transistors with self-aligned grain-growth nanowire channels Liao, Ta-Chuan; Kang, Tsung-Kuei; Lin, Chia-Min; Wu, Chun-Yu; Cheng, Huang-Chung
國立交通大學 2014-12-08T15:30:22Z Gate-All-Around Single-Crystal-Like Poly-Si Nanowire TFTs With a Steep-Subthreshold Slope Liu, Tung-Yu; Lo, Shen-Chuan; Sheu, Jeng-Tzong
國立成功大學 2004-11-22 Gate-alloy-related kink effect for metamorphic high-electron-mobility transistors Chen, Y. J.; Hsu, Wei-Chou; Lee, C. S.; Wang, T. B.; Tseng, C. H.; Huang, J. C.; Huang, D. H.; Wu, C. L.
臺大學術典藏 2018-09-10T14:57:38Z Gate-bias stress stability of P-type SnO thin-film transistors fabricated by RF-sputtering Chiu, I.-C.;Cheng, I.-C.; Chiu, I.-C.; Cheng, I.-C.; I-CHUN CHENG
國立交通大學 2015-12-04T07:03:11Z GATE-BOOSTING RECTIFIER AND METHOD OF PERMITTING CURRENT TO FLOW IN FAVOR OF ONE DIRECTION WHEN DRIVEN BY AC INPUT VOLTAGE Wang Yu-Jiu; Liao I-No; Tsai Chao-Han; Pakasiri Chatrpol
國立中山大學 2006 Gate-controlled spin splitting in GaN/AlN quantum wells Ikai Lo;W.T. Wang;M.H. Gao;J.K. Tsai;S.F. Tsay;J.C. Chiang
國立中山大學 2006 Gate-controlled Spin Splitting in GaN/AlN Quantum Wells Ikai Lo;W.T. Wang;M.H. Gau;S.F. Tsay;Jih-Chen Chiang
國立中山大學 2006 Gate-Controlled Spin Splitting in GaN/AlN Quantum Wells Ikai Lo;W.T. Wang;M.H. Gau;J.K. Tsai;S.F. Tsay;J.C. Chiang
國立交通大學 2014-12-08T15:17:41Z Gate-controlled ZnO nanowires for field-emission device application Li, SY; Lee, CY; Lin, P; Tseng, TY
國立交通大學 2014-12-08T15:31:00Z Gate-first n-MOSFET with a sub-0.6-nm EOT gate stack Cheng, C. H.; Chou, K. I.; Chin, A.
國立交通大學 2014-12-08T15:47:59Z Gate-First TaN/La(2)O(3)/SiO(2)/Ge n-MOSFETs Using Laser Annealing Chen, W. B.; Wu, C. H.; Shie, B. S.; Chin, Albert
中華大學 2010 Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing 吳建宏; rossiwu
國立交通大學 2019-04-02T06:00:27Z Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing Chen, W. B.; Wu, C. H.; Shie, B. S.; Chin, Albert
國立交通大學 2019-04-02T05:58:20Z Gate-induced localized states in graphene: Topological nature in their formation Wang, L. Y.; Chang, Che-Yuan; Chu, C. S.
臺大學術典藏 2018-09-10T06:02:15Z Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) for Designing High-Speed Low-Power SOC Applications Using 90nm MTCMOS Technology B. Chung; J. B. Kuo; JAMES-B KUO

显示项目 445681-445705 / 2348609 (共93945页)
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