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教育部委托研究计画 计画执行:国立台湾大学图书馆
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显示项目 575291-575300 / 2348570 (共234857页)
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| 國立交通大學 |
2014-12-16T06:15:42Z |
MEMORY-BASED FFT/IFFT PROCESSOR AND DESIGN METHOD FOR GENERAL SIZED MEMORY-BASED FFT PROCESSOR
|
LEE, Chen-Yi; Hsiao, Chen-Fong; Chen, Yuan |
| 國立高雄應用科技大學 |
1998-12 |
Memory-Based Function Approzimation
|
Shieh, Chin-Shiuh;Pan, Jenq-Shyang |
| 臺大學術典藏 |
2018-09-10T07:10:54Z |
Memory-Based Judgments: The Role of Information Typicality and Processing Ability
|
Lien, Nai-Hwa;Douglas M. Stayman; Lien, Nai-Hwa; Douglas M. Stayman; NAI-HWA LIEN |
| 實踐大學 |
2002 |
Memory-based sigma-pi-sigma neural network
|
Li, C.K. |
| 臺大學術典藏 |
2018-09-10T14:54:02Z |
Memory-based two-dimensional-parallel differential matched filter correlator for global navigation satellite system code acquisition
|
Chen, C.-W.;Chen, S.-H.;Tsao, H.-W.;Mao, W.-L.; Chen, C.-W.; Chen, S.-H.; Tsao, H.-W.; Mao, W.-L.; HEN-WAI TSAO |
| 中華大學 |
2006 |
Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Memory-Efficiency and High-Speed Architectures for Forward and Inverse DCT with Multiplierless Operation
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Memory-Efficiency Multiplierless VLSI Architecture for 2-D DWT Using 9/7 Wavelet Filter
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
Memory-Efficient and Fast Architectures for Forward and Inverse DCT with Multiplierless Operation
|
宋志雲; Sung, Tze-Yun |
显示项目 575291-575300 / 2348570 (共234857页)
<< < 57525 57526 57527 57528 57529 57530 57531 57532 57533 57534 > >>
每页显示[10|25|50]项目
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