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显示项目 807016-807025 / 2351377 (共235138页)
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每页显示[10|25|50]项目
| 臺大學術典藏 |
2020-05-04T07:48:21Z |
System-Level Performance and Power Optimization for MPSoC: A Memory Access-Aware Approach
|
Lin, Ye-Jyun;Yang, Chia-Lin;Huang, Jiao-We;Lin, Tay-Jyi;Hsueh, Chih-Wen;Chang, Naehyuck; Lin, Ye-Jyun; Yang, Chia-Lin; Huang, Jiao-We; Lin, Tay-Jyi; Hsueh, Chih-Wen; Chang, Naehyuck; CHIH-WEN HSUEH |
| 臺大學術典藏 |
2011 |
System-level requirements for implementing wide dynamic range pulse-modulated polar transmitters
|
Chen, J.-H.; Lin, H.-C.; Lin, H.-C.;Chen, J.-H. |
| 國立臺灣大學 |
2011 |
System-level requirements for implementing wide dynamic range pulse-modulated polar transmitters
|
Lin, H.-C.; Chen, J.-H. |
| 臺大學術典藏 |
2020-01-17T07:44:53Z |
System-level requirements for implementing wide dynamic range pulse-modulated polar transmitters
|
Chen, J.-H.; JAU-HORNG CHEN; Lin, H.-C.; JAU-HORNG CHEN;Chen, J.-H.;Lin, H.-C. |
| 國立交通大學 |
2014-12-08T15:24:49Z |
System-level veri cation on high-level synthesis of dataflow graph
|
Chiang, Tsung-Hsi; Dung, Lan-Rong |
| 國立暨南國際大學 |
2010 |
System-on-Chip Architecture for Speech Recognition
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郭桂廷?; Kuo, KT |
| 國立暨南國際大學 |
2010 |
System-on-Chip Architecture for Speech Recognition
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吳俊德?; Wu, GD |
| 國立中山大學 |
2005-10 |
System-on-Chip Implementation of the Whole Advanced Encryption Standard (AES) Processor Using Reduced XOR-based Sum-of-Product Operations
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Shen-Fu Hsiao;Ming-Chih Chen;Ming-Yu Tsai;Chi-Chen Lin |
| 國立高雄第一科技大學 |
2005.10 |
System-on-chip implementation of the whole advanced encryption standard processor using reduced XOR-based sum-of-product operations
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Hsiao, S.-F.;Chen, M.-C.;Tsai, M.-Y.;Lin, C.-C. |
| 淡江大學 |
2026-10 |
System-scale hydraulic trade-offs of dredging in confined urban rivers: Insights from the Tamsui basin
|
Chen, Wan-Cheng;You, Gene Jiing-Yun;Hwang, Gwo-wen;Lin, Jen-Yang;Hung, Yu-Ju |
显示项目 807016-807025 / 2351377 (共235138页)
<< < 80697 80698 80699 80700 80701 80702 80703 80704 80705 80706 > >>
每页显示[10|25|50]项目
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