| 中華大學 |
2013 |
Timing-Constrained Replacement Using Spare Cells for Design Changes
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2008 |
Timing-Constrained Yield-driven Redundant Via Insertion
|
顏金泰; YAN, JIN-TAI |
| 國立交通大學 |
2017-04-21T06:49:38Z |
Timing-Constrained Yield-Driven Redundant Via Insertion
|
Yan, Jin-Tai; Chen, Zhi-Wei; Chiang, Bo-Yi; Lee, Yu-Min |
| 中華大學 |
2006 |
Timing-Constrained Yield-Driven Wire Sizing for Critical Area Minimization
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2007 |
Timing-Constrained Yield-Driven Wiring Reconstruction for Critical Area Minimization
|
顏金泰; YAN, JIN-TAI |
| 國立臺北護理健康大學 |
2020-07 |
Timing-dependent effects of transcranial direct current stimulation with mirror therapy on daily function and motor control in chronic stroke: a randomized controlled pilot study
|
Liao, Wan-Wen; Chiang, Wei-Chi; Lin, Keh-Chung; Wu, Ching-Yi; Liu, Chien-Ting; Hsieh, Yu-Wei; Lin, Yun-Chung; Chen, Chia-Ling |
| 臺大學術典藏 |
2021-01-22T03:33:14Z |
Timing-dependent effects of transcranial direct current stimulation with mirror therapy on daily function and motor control in chronic stroke: a randomized controlled pilot study.
|
Liao, W-W.;Chiang, W-C.;Keh-Chung Lin;Wu, C-Y.;Liu, C-T.;Hsieh, Y-W.;Lin, Y-C.;Chen, C-L.; Liao, W-W.; Chiang, W-C.; KEH-CHUNG LIN; Wu, C-Y.; Liu, C-T.; Hsieh, Y-W.; Lin, Y-C.; Chen, C-L. |
| 國立成功大學 |
2024 |
Timing-Driven Analytical Placement According to Expected Cell Distribution Range
|
Lin;J, -M.;Chang;Y, -Y.;Huang;W, -L. |
| 臺大學術典藏 |
2018-09-10T15:36:26Z |
Timing-Driven Cell Placement Optimization for Early Slack Histogram Compression
|
C. C. Huang; Y. C. Liu; Y. S. Lu; Y. C. Kuo; Y. W. Chang; S. Y. Kuo; SY-YEN KUO; YAO-WEN CHANG |
| 中華大學 |
2008 |
Timing-Driven Multi-Layer Steiner Tree Construction with Obstacle Avoidance
|
顏金泰; YAN, JIN-TAI |
| 中原大學 |
2009-05 |
Timing-Driven Non-Rectangular Obstacles-Avoiding Routing Algorithm for the X-Architecture
|
Hsin-Hsiung Huang;Shu-Ping Chang;Yu-Cheng Lin; Tsai-Ming Hsieh |
| 中華大學 |
2006 |
Timing-Driven Octilinear Steiner Tree Construction Based on Steiner-Point Reassignment
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2008 |
Timing-Driven Octilinear Steiner Tree Construction Based on Steiner-Point Reassignment and Path Reconstruction
|
顏金泰; YAN, JIN-TAI |
| 國立交通大學 |
2014-12-08T15:03:04Z |
TIMING-DRIVEN PARTIAL SCAN
|
JOU, JY; CHENG, KT |
| 國立交通大學 |
2014-12-08T15:45:04Z |
Timing-driven routing for symmetrical array-based FPGAs
|
Chang, YW; Zhu, K; Wong, DF |
| 臺大學術典藏 |
2018-09-10T03:29:37Z |
Timing-driven routing for symmetrical array-based FPGAs
|
Chang, Y.-W.; Zhu, K.; Wong, D.F.; YAO-WEN CHANG |
| 國立臺灣大學 |
2000 |
Timing-driven routing for symmetrical-array-based FPGAs
|
CHANG, YAO-WEN; ZHU, KAI; WONG, D. F. |
| 臺大學術典藏 |
2018-09-10T07:03:50Z |
Timing-driven routing for symmetrical-array-based FPGAs
|
Zhu, Kai; Chang, Yao-Wen; Wong, D.F.; YAO-WEN CHANG |
| 中華大學 |
2005 |
Timing-Driven Steiner Tree Construction Based on Feasible Assignment of Hidden Steiner Points
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2008 |
Timing-Driven Steiner Tree Construction for Three-Dimensional ICs
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2005 |
Timing-Driven Steiner Tree Construction with Buffer Insertion
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2007 |
Timing-Driven Steiner Tree Construction with Wire Sizing, Buffer Insertion and Obstacle Avoidance
|
顏金泰; YAN, JIN-TAI |
| 臺大學術典藏 |
2020-05-04T07:48:14Z |
Timing-Driven Test Point Insertion for Full-Scan and Partial-Scan BIST.
|
Cheng, Kwang-Ting;Lin, Chih-Jen; Cheng, Kwang-Ting; Lin, Chih-Jen; CHIH-JEN LIN |
| 中原大學 |
2009-06 |
Timing-Driven X-Architecture Routing Tree Constructio Among Rectangular and Non-rectangular Obstacles
|
Shu-Ping Chang; Hsin-Hsiung Huang; Cheng-Chiang Lin; Tsai-Ming Hsieh |
| 臺大學術典藏 |
2018-09-10T03:29:23Z |
Timing-jitter reduction of passively Q-switched laser by a reentrant 2-mirror ring cavity
|
Huang, P.L.; Cheng, H.Z.; Huang, S.L.; SHENG-LUNG HUANG |
