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教育部委托研究计画 计画执行:国立台湾大学图书馆
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显示项目 90981-90990 / 2351361 (共235137页)
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每页显示[10|25|50]项目
| 國立臺灣大學 |
2004-08 |
A 1.7~3.125Gbps clock and data recovery circuit using a gated frequency detector
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Yang, Rong-Jyi; Liu, Shen-Iuan |
| 元智大學 |
2014-04-26 |
A 1.8 GHz CMOS High-Linear Power-Combining Power Amplifier Using On-Chip Transmission Line Transformer
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Ming-Yi Chen; Jeng-Rern Yang |
| 國立中山大學 |
2009-12 |
A 1.8 V to 3.3 V Level-Converting Flip-Flop Design for Multiple Power Supply Systems
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C.C. Wang;K.S.M. Li;S.J. Wang |
| 國立交通大學 |
2014-12-08T15:25:41Z |
A 1.8 V, 10 Gbps fully integrated CMOS optical receiver analog front end
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Chen, WZ; Cheng, YL; Lin, DS |
| 臺大學術典藏 |
2021-03-12T08:40:55Z |
A 1.8-GHz Near-Field Dielectric Plethysmography Heart-Rate Sensor with Time-Based Edge Sampling
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JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN |
| 國立交通大學 |
2014-12-08T15:18:59Z |
A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end
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Chen, WZ; Cheng, YL; Lin, DS |
| 淡江大學 |
2013-06 |
A 1.8-V 4-ppm oC Reference Current with Process and Temperature
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Yang, Wei-Bin; Hong, Ming-Hao; Yeh, Sheng-Shuh |
| 淡江大學 |
2015/09/13 |
A 1.8-V Temperature Coefficient is 4.36-ppm/°C Bandgap Reference Current with Process Calibration
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Yang, Wei-Bin |
| 元智大學 |
2016-06-23 |
A 1.8/2.6 GHz CMOS High Linearity Power Amplifier for LTE application
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Chih-Huang Lin; Jeng-Rern Yang |
| 國立交通大學 |
2019-04-02T06:04:51Z |
A 1.86mJ/Gb/Query Bit-Plane Payload Machine Learning Processor in 90nm CMOS
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Ku, Fang-Ju; Wu, Tung-Yu; Liao, Yen-Chin; Chang, Hsie-Chia; Wong, Wing Hung; Lee, Chen-Yi |
显示项目 90981-90990 / 2351361 (共235137页)
<< < 9094 9095 9096 9097 9098 9099 9100 9101 9102 9103 > >>
每页显示[10|25|50]项目
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