| 臺大學術典藏 |
2020-01-03T06:14:13Z |
A 3-year surveillance on causes of death or reasons for euthanasia of domesticated dogs in Taiwan
|
Huang W.-H.; Liao A.T.; Chu P.-Y.; Zhai S.-H.; Yen I.-F.; Liu C.-H.; WEI-HSIANG HUANG |
| 臺北醫學大學 |
2009 |
A 3-Years Evaluation of the Pay-for-Performance Program for Asthma under the National Health Insurance in Taiwan
|
Yu-Yin Fang; Shou-Hsia Cheng |
| 國立交通大學 |
2014-12-08T15:24:44Z |
A 3.1 similar to 10.6 GHz CMOS direct-conversion receiver for UWB applications
|
Wu, Chung-Yu; Lo, Yi-Kai; Chen, Min-Chiao |
| 國立臺灣大學 |
2004-08 |
A 3.1-10.6 GHz CMOS cascaded two-stage distributed amplifier for ultra-wideband application
|
Chen, Kuan-Hung; Wang, Chorng-Kuang |
| 國立高雄師範大學 |
2004-12 |
A 3.1-10.6 GHz Ultra Wide Band CMOS Low Noise Amplifier
|
Ruey-Lue Wang;Shin-Chin Chen;Ming-Lung Kung;Hen-Cho Hung; 王瑞祿 |
| 國立暨南國際大學 |
2013 |
A 3.1-10.6-GHz Current-Reused CMOS Ultra-Wideband Low-Noise Amplifier Using Self-Forward Body Bias and Forward Combining Techniques
|
吳家豪; Wu, CH |
| 國立暨南國際大學 |
2013 |
A 3.1-10.6-GHz Current-Reused CMOS Ultra-Wideband Low-Noise Amplifier Using Self-Forward Body Bias and Forward Combining Techniques
|
林佑昇; Lin, YS |
| 國立暨南國際大學 |
2013 |
A 3.1-10.6-GHz Current-Reused CMOS Ultra-Wideband Low-Noise Amplifier Using Self-Forward Body Bias and Forward Combining Techniques
|
王建今; Wang, CC |
| 元智大學 |
2012-05-05 |
A 3.1-10.6GHz CMOS Low-Voltage Mixer with Active Balun Designed for UWB Systems
|
Chien-Hua Lai; Jeng-Rern Yang |
| 元智大學 |
2012-05-05 |
A 3.1-10.6GHz CMOS Low-Voltage Mixer with Active Balun Designed for UWB Systems
|
Chien-Hua Lai; Jeng-Rern Yang |
| 國立暨南國際大學 |
2012 |
A 3.1-dB NF, 21.31 dB gain micromachined 3-10 GHz distributed amplifier for UWB systems in 0.18-mu m CMOS technology
|
張錦法; Chang, JF |
| 國立暨南國際大學 |
2012 |
A 3.1-dB NF, 21.31 dB gain micromachined 3-10 GHz distributed amplifier for UWB systems in 0.18-mu m CMOS technology
|
林佑昇; Lin, YS |
| 國立交通大學 |
2017-04-21T06:49:42Z |
A 3.12 pJ/bit, 19-27 Gbps Receiver with 2 Tap-DFE Embedded Clock and Data Recovery
|
Hong, Zheng-Hao; Chen, Wei-Zen |
| 國立交通大學 |
2016-03-28T00:04:12Z |
A 3.12 pJ/bit, 19-27 Gbps Receiver With 2-Tap DFE Embedded Clock and Data Recovery
|
Hong, Zheng-Hao; Liu, Yao-Chia; Chen, Wei-Zen |
| 國立交通大學 |
2014-12-08T15:09:08Z |
A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer
|
Chen, Wei-Zen; Huang, Shih-Hao; Wu, Guo-Wei; Liu, Chuan-Chang; Huang, Yang-Tung; Chiu, Chin-Fong; Chang, Wen-Hsu; Juang, Ying-Zong |
| 國立臺灣大學 |
2004 |
A 3.125-Gb/s Clock and Data Recovery Circuit for the 10-Gbase-LX4 Ethernet
|
Yang, Rong-Jyi; Chen, Shang-Ping; Liu, Shen-Iuan |
| 國立交通大學 |
2017-04-21T06:49:35Z |
A 3.2 mW MIXED-SIGNAL READOUT CIRCUIT FOR AN ORGANIC VERTICAL NANO-JUNCTIONS SENSOR
|
Chao, Paul C. -P.; Su, Chin-I; Tran, Trong-Hieu; Zan, Hsiao-Wen |
| 臺大學術典藏 |
2018-09-10T09:21:52Z |
A 3.2fJ/c.-s. 0.35V 10b 100KS/s SAR ADC in 90nm CMOS
|
Tai, H.-Y.; Chen, H.-W.; Chen, H.-S.; HSIN-SHU CHEN |
| 國立臺灣大學 |
2008 |
A 3.3 mW K-Band 0.18μm 1P6M CMOS Active Bandpass Filter Using Complementary Current-Reuse Pair
|
Huang, Kuo-Ken; Chiang, Meng-Ju; Tzuang, C.-K.C. |
| 淡江大學 |
1998-05-31 |
A 3.3 V all digital phase-locked loop with small DCO hardware and fast phase lock
|
江正雄; Chiang, Jen-shiun; Chen, Kuang-yuan |
| 淡江大學 |
1998-11-24 |
A 3.3 V two-stage fourth-order sigma-delta modulator with gain compensation technique
|
江正雄; Chiang, Jen-shiun; Chou, Pao-chu |
| 國立臺灣大學 |
1998 |
A 3.3-V CMOS Wideband Exponential Control Variable-Gain-Amplifier
|
Huang, Po-Chiun; Li-Yu Chiou; 汪重光; Huang, Po-Chiun; Li-Yu Chiou; Wang, Chorng-Kuang |
| 國立交通大學 |
2014-12-08T15:25:09Z |
A 3.33Gb/s (1200,720) low-density parity check code decoder
|
Lin, CC; Lin, KL; Chang, HC; Lee, CY |
| 國立臺灣大學 |
2008-02 |
A 3.3mW K-band 0.18-um 1P6M CMOS Active Bandpass Filter Using Complementary Current-Reuse Pair
|
Huang, K.-K.; Chiang, Meng-Ju; Tzuang, Ching-Kuang C. |
| 國立中山大學 |
2004-08 |
A 3.3V 10-bit 50-MS/s Pipelined Analog-to-Digital Converter with Low-Deviation MDAC
|
Chun-Ta Wang;Jyi-Tsong Lin |
