|
English
|
正體中文
|
简体中文
|
总笔数 :0
|
|
造访人次 :
51951847
在线人数 :
903
教育部委托研究计画 计画执行:国立台湾大学图书馆
|
|
|
显示项目 916671-916680 / 2348419 (共234842页) << < 91663 91664 91665 91666 91667 91668 91669 91670 91671 91672 > >> 每页显示[10|25|50]项目
| 國立成功大學 |
2018 |
VLSI Architecture for Novel Hopping Discrete Fourier Transform Computation
|
Juang, W.-H.;Lai, S.-C.;Luo, C.-H.;Lee, S.-Y. |
| 臺大學術典藏 |
2018-09-10T05:15:50Z |
VLSI architecture for radix-2k Viterbi decoding with transpose algorithm
|
Lee, Wen-Ta;Chen, Thou-Ho;Chen, Liang-Gee; Lee, Wen-Ta; Chen, Thou-Ho; Chen, Liang-Gee; LIANG-GEE CHEN |
| 國立交通大學 |
2014-12-08T15:27:25Z |
VLSI Architecture for Real-Time HD1080p View Synthesis Engine
|
Horng, Ying-Rung; Tseng, Yu-Cheng; Chang, Tian-Sheuan |
| 國立交通大學 |
2014-12-08T15:05:45Z |
VLSI architecture for the low-computation cycle and power-efficient recursive DFT/IDFT design
|
Van, Lan-Da; Lin, Chin-Teng; Yu, Yuan-Chu |
| 義守大學 |
2009-07 |
VLSI Architecture of Euclideanized BM Algorithm for Reed-Solomon Code
|
Huang-Chi Chen;Yu-Wen Chang;Rey-Chue Hwang |
| 國立交通大學 |
2017-04-21T06:49:35Z |
VLSI Architecture of Leading Eigenvector Generation for On-chip Principal Component Analysis Spike Sorting System
|
Chen, Tung-Chien; Liu, Wentai; Chen, Liang-Gee |
| 淡江大學 |
2005 |
VLSI architecture of low memory and high speed 2D lifting-based discrete wavelet transform for JPEG2000 applications
|
Chiang, Jen-Shiun; Hsia, Chih-Hsien; Chen, Hsin-Jung; Lo, Te-Jung |
| 義守大學 |
2003-10 |
VLSI architecture of modified Euclidean algorithm for Reed-Solomon code
|
Y.W. Chang;T.K. Truong;J.H. Jeng |
| 國立成功大學 |
2020 |
VLSI architecture of polynomial multiplication for BGV fully homomorphic encryption
|
Hsu, Hsu H.-J.;Shieh, M.-D. |
| 國立成功大學 |
2022 |
VLSI Architecture of S-Box With High Area Efficiency Based on Composite Field Arithmetic
|
Teng;You-Tun;Chin;Wen-Long;Chang;Deng-Kai;Chen;Pei-Yin;Chen;Pin-Wei |
显示项目 916671-916680 / 2348419 (共234842页) << < 91663 91664 91665 91666 91667 91668 91669 91670 91671 91672 > >> 每页显示[10|25|50]项目
|