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顯示項目 471266-471275 / 2348674 (共234868頁) << < 47122 47123 47124 47125 47126 47127 47128 47129 47130 47131 > >> 每頁顯示[10|25|50]項目
| 國立成功大學 |
2015-12-14 |
High-performance ultraviolet detection and visible-blind photodetector based on Cu2O/ZnO nanorods with poly-(N-vinylcarbazole) intermediate layer
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Perng, Dung-Ching; Lin, Hsueh-Pin; Hong, Min-Hao |
| 國立交通大學 |
2018-08-21T05:53:58Z |
High-Performance Uniaxial Tensile Strained n-Channel JL SOI FETs and Triangular JL Bulk FinFETs for Nanoscaled Applications
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Sung, Po-Jung; Cho, Ta-Chun; Hou, Fu-Ju; Hsueh, Fu-Kuo; Chung, Sheng-Ti; Lee, Yao-Jen; Current, Michael I.; Chao, Tien-Sheng |
| 國立成功大學 |
2023 |
High-Performance UV Photodetectors Based on 1-D Ag/ZnO Nanostructures with a Simple Photochemical Process at Room Temperature
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Chu, Y.-L.;Young, S.-J.;Chu, Y.-J.;Liu, Y.-H.;Chu, T.-T. |
| 國立交通大學 |
2014-12-08T15:21:37Z |
High-performance vertical polymer nanorod transistors based on air-stable conjugated polymer
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Chao, Yu-Chiang; Chung, Chin-Ho; Zan, Hsiao-Wen; Meng, Hsin-Fei; Ku, Ming-Che |
| 國立交通大學 |
2014-12-08T15:28:35Z |
High-performance vertically stacked bottom-gate and top-gate polycrystalline silicon thin-film transistors for three-dimensional integrated circuits
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Lee, I-Che; Tsai, Tsung-Che; Tsai, Chun-Chien; Yang, Po-Yu; Wang, Chao-Lung; Cheng, Huang-Chung |
| 東海大學 |
2008 |
High-performance very large scale integration architecture design for various-ratio image scaling
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Lin, C.-C.a , Sheu, M.-H.a, Chiang, H.-K.a, Liaw, C.b |
| 國立臺灣大學 |
2004 |
High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme
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Yang, Meng-Da; Wu, An-Yeu; Lai, Jyh-Ting |
| 臺大學術典藏 |
2018-09-10T04:56:06Z |
High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme
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Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU |
| 臺大學術典藏 |
2019-10-24T07:57:17Z |
High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme
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吳安宇;AN-YEU(ANDY) WU;Jyh-Ting (Justin) Lai;An-Yeu Wu;Meng-Da Yang; Meng-Da Yang; An-Yeu Wu; Jyh-Ting (Justin) Lai; AN-YEU(ANDY) WU; 吳安宇 |
| 國立臺灣大學 |
2006 |
High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems
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Lin, Chih-Hsiu; Wu, An-Yeu; Li, Fan-Min |
顯示項目 471266-471275 / 2348674 (共234868頁) << < 47122 47123 47124 47125 47126 47127 47128 47129 47130 47131 > >> 每頁顯示[10|25|50]項目
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