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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 558601-558610 / 2348419 (共234842頁)
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每頁顯示[10|25|50]項目
| 國立成功大學 |
2009-04 |
Low-Leakage and Low-Power Implementation of High-Speed Logic Gates
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Wu, Tsung-Yi; Lu, Liang-Ying |
| 國立彰化師範大學 |
2009 |
Low-Leakage and Low-Power Implementation of High-Speed Logic Gates
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Wu, Tsung-Yi ; Lu, Liang-Ying |
| 國立交通大學 |
2017-04-21T06:55:58Z |
Low-Leakage and Low-Trigger-Voltage SCR Device for ESD Protection in 28-nm High-k Metal Gate CMOS Process
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Lin, Chun-Yu; Wu, Yi-Han; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:56:27Z |
Low-Leakage Bidirectional SCR With Symmetrical Trigger Circuit for ESD Protection in 40-nm CMOS Process
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Altolaguirre, Federico A.; Ker, Ming-Dou |
| 國立成功大學 |
2020 |
Low-Leakage Capacitive Coupling Structure for a-Si:H Gate Driver With Less Delay of Clock Signals Used in AMLCDs
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Deng;Ming-Yang;Liao;Wei-Sheng;Chen;Sung-Chun;Chang;Jui-Hung;Wu;Chia-En;Lin;Chih-Lung |
| 國立交通大學 |
2014-12-08T15:25:18Z |
Low-Leakage Electrostatic Discharge Protection Circuit in 65-nm Fully-Silicided CMOS Technology
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Wang, Chang-Tzu; Ker, Ming-Dou; Tang, Tien-Hao; Su, Kuan-Cheng |
| 義守大學 |
2009 |
Low-leakage electrostatic discharge protection circuit in 65-nm fully-silicided CMOS technology
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Wang, Chang-Tzu ; Ker, Ming-Dou ; Tang, Tien-Hao ; Su, Kuan-Cheng |
| 國立交通大學 |
2014-12-08T15:25:16Z |
Low-leakage In(0.53)Ga(0.47)As p-i-n photodetector fabricated on GaAs substrate with linearly graded metamorphic In(x)Ga(1-x)P buffer
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Lin, CK; Kuo, HC; Liao, YS; Lin, GR |
| 臺大學術典藏 |
2005 |
Low-leakage in0.53Ga0.47As p-i-n photodetector fabricated on GaAs substrate with linearly graded metamorphic in xGa1-xP buffer
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Kuo, H.-C.; Liao, Y.-S.; Lin, G.-R.; GONG-RU LIN; Lin, C.-K. |
| 國立交通大學 |
2019-04-02T06:04:21Z |
Low-Leakage Power-Rail ESD Clamp Circuit With Gated Current Mirror in a 65-nm CMOS Technology
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Aliolaguirre, Federico A.; Keri, Ming-Dou |
顯示項目 558601-558610 / 2348419 (共234842頁)
<< < 55856 55857 55858 55859 55860 55861 55862 55863 55864 55865 > >>
每頁顯示[10|25|50]項目
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