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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 559511-559520 / 2351427 (共235143頁)
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| 中華大學 |
2009 |
Low-Power Multiplier Design with Row and Column Bypassing
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顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters
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謝曜式; Shieh, Yaw-Shih |
| 國立交通大學 |
2014-12-08T15:35:28Z |
Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors
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Wang, Dao-Ping; Lin, Hon-Jarn; Chuang, Ching-Te; Hwang, Wei |
| 國立臺灣大學 |
1998 |
Low-Power Multirate Architecture for IF Digital Frequency Down-Converter
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Shyh-Jye Jou; Shou-Yang Wu; 汪重光; Shyh-Jye Jou; Shou-Yang Wu; Wang, Chorng-Kuang |
| 臺大學術典藏 |
2004-05 |
Low-power parallel tree architecture for full search block-matching motion estimation
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Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee; Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Low-power parallel tree architecture for full search block-matching motion estimation
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Lin, Siou-Shen; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:47:18Z |
Low-power parallel tree architecture for full search block-matching motion estimation
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Lin, S.-S.; Tseng, P.-C.; Chen, L.-G.; Lin, S.-S.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立成功大學 |
2022-04 |
Low-Power Photodetectors Based on PVA-Modified Reduced Graphene Oxide Hybrid Solutions
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Shih;Yi-Shan;Li;Wei-Chen;Shen;Jun-Hao;Chu;Shao-Yu;Uen;Wu-Yih;Lee;Hsin-Ying;Lin;Gong-Ru;Chen;Yu-Cheng;Tu;Wei-Chen |
| 國立臺灣科技大學 |
2019 |
Low-power photovoltaic energy harvesting with parallel differential power processing using a SEPIC
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Bagci, F.S.;Liu, Y.-C.;Kim, Kim K.A. |
顯示項目 559511-559520 / 2351427 (共235143頁)
<< < 55947 55948 55949 55950 55951 55952 55953 55954 55955 55956 > >>
每頁顯示[10|25|50]項目
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