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顯示項目 575171-575180 / 2348617 (共234862頁)
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| 臺大學術典藏 |
2020-05-04T07:27:46Z |
Memory access aware power gating for MPSoCs.
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Lin, Ye-Jyun; Lin, Ye-Jyun;Yang, Chia-Lin;Huang, Jiao-Wei;Chang, Naehyuck; Yang, Chia-Lin; Huang, Jiao-Wei; Chang, Naehyuck; CHIA-LIN YANG |
| 臺大學術典藏 |
2018-09-10T05:58:17Z |
Memory access optimization of motion estimation algorithms on a native SIMD PLX processor
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Lin, G.-H.; Chen, S.-J.; Lee, R.B.; Hu, Y.-H.; SAO-JIE CHEN |
| 亞洲大學 |
2017-08 |
Memory allocation and computations for Laplace’s equation of 3-D arbitrary boundary problems
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蔡存孝;Tswn-Syau,Tsai; |
| 臺大學術典藏 |
2018-07-06T13:43:05Z |
Memory analysis and architecture for two-dimensional discrete wavelet transform
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Chen, Liang-Gee; Tseng, Po-Chih; Huang, Chao-Tsung; Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Memory analysis and architecture for two-dimensional discrete wavelet transform
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Huang, Chao-Tsung; Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:47:18Z |
Memory analysis and architecture for two-dimensional discrete wavelet transform
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Huang, C.-T.; Tseng, P.-C.; Chen, L.-G.; Huang, C.-T.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立交通大學 |
2014-12-08T15:23:35Z |
Memory Analysis for H.264/AVC Scalable Extension Encoder
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Chen, Tzu-Yu; Li, Gwo-Long; Chang, Tian-Sheuan |
| 國立臺灣大學 |
2005-03 |
Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering
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Huang, Chao-Tsung; Chen, Ching-Yeh; Chen, Yi-Hau; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T05:15:47Z |
Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering
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Huang, C.-T.; Chen, C.-Y.; Chen, Y.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立臺灣大學 |
2005-05 |
Memory and computationally efficient psychoacoustic model for MPEG AAC on 16-bit fixed-point processors
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Huang, Shih-Way; Chen, Liang-Gee; Tsai, Tsung-Han |
顯示項目 575171-575180 / 2348617 (共234862頁)
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