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顯示項目 649741-649750 / 2348617 (共234862頁)
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機構 日期 題名 作者
國立臺灣大學 2005 Parallel Analysis with Unidimensional Binary Data Weng, Li-Jen; Cheng, Chung-Ping
臺大學術典藏 2020-07-10T08:16:55Z Parallel analysis with unidimensional binary data Weng, L.-J.; Cheng, C.-P.; Weng, L.-J.; Cheng, C.-P.; LI-JEN WENG
國立臺灣科技大學 2010-06 Parallel and element-reduced error-diffused block truncation coding Jing-Ming Guo;Chih-Yu Lin
國立臺灣科技大學 2009 Parallel and element-reduced Error-Diffused Block Truncation Coding Jing-Ming Guo;Chih-Yu Lin
國立臺灣科技大學 2009 Parallel and element-reduced error-diffused block truncation coding Guo J.-M.; Lin C.-Y.
國立交通大學 2018-08-21T05:56:57Z Parallel and Local Diagnostic Algorithm for Wireless Sensor Networks Wang, Lidan; Zhang, Xiaofei; Tseng, Yu-Chee; Lin, Cheng-Kuan
臺大學術典藏 2020-06-16T06:36:18Z Parallel architecture and hardware implementation of pre-processor and post-processor for sequence assembly Li, Y.-C.; Lu, Y.-C.; YI-CHANG LU; Kuo, Y.-H.;Liu, C.-S.;Li, Y.-C.;Lu, Y.-C.; Kuo, Y.-H.; Liu, C.-S.
國立交通大學 2014-12-08T15:12:02Z Parallel Architecture Core (PAC)-the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools Chang, David Chih-Wei; Lin, Tay-Jyi; Wu, Chung-Ju; Lee, Jenq-Kuen; Chu, Yuan-Hua; Wu, An-Yeu
臺大學術典藏 2018-09-10T08:43:20Z Parallel architecture core (PAC)-the first multicore application processor SoC in Taiwan part I: Hardware architecture & software development tools Wu, C.-J.; Lee, J.-K.; Chu, Y.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU; Chang, D.C.-W.;Lin, T.-J.;Wu, C.-J.;Lee, J.-K.;Chu, Y.-H.;Wu, A.-Y.; Chang, D.C.-W.; Lin, T.-J.
臺大學術典藏 2018-09-10T08:43:20Z Parallel architecture core (PAC)-the first multicore application processor SoC in Taiwan part II: Application programming Chen, J.-M.;Liu, C.-N.;Yang, J.-K.;Tseng, S.-Y.;Shih, W.-K.;Wu, A.-Y.; Chen, J.-M.; Liu, C.-N.; Yang, J.-K.; Tseng, S.-Y.; Shih, W.-K.; Wu, A.-Y.; AN-YEU(ANDY) WU

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