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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 649846-649855 / 2348617 (共234862頁)
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每頁顯示[10|25|50]項目
| 臺大學術典藏 |
1985 |
Parallel Generation of Permutations and Combinations.
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陳健輝;Chern, M. S.; Chen, Gen-Huey;Chern, M. S.; 陳健輝; Chern, M. S.; Chen, Gen-Huey |
| 國立交通大學 |
2014-12-08T15:05:30Z |
PARALLEL GENERATION OF PERMUTATIONS ON SYSTOLIC ARRAYS
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LIN, CJ |
| 國立交通大學 |
2014-12-08T15:10:16Z |
Parallel Genetic Algorithm for Intelligent Model Parameter Extraction of Metal-Oxide-Semiconductor Field Effect Transistors
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Li, Yiming |
| 臺大學術典藏 |
2004-05 |
Parallel global elimination algorithm and architecture design for fast block matching motion estimation
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Huang, Yu-Wen; Tsai, Chen-Han; Chen, Liang-Gee; Huang, Yu-Wen; Tsai, Chen-Han; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Parallel global elimination algorithm and architecture design for fast block matching motion estimation
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Huang, Yu-Wen; Tsai, Chen-Han; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:47:17Z |
Parallel global elimination algorithm and architecture design for fast block matching motion estimation
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Huang, Y.-W.; Tsai, C.-H.; Chen, L.-G.; Huang, Y.-W.; Tsai, C.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立中山大學 |
1990 |
Parallel Graph Algorithms Based upon Broadcast Communications
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Chang-Biau Yang;R.C.T. Lee;W.T. Chen |
| 臺大學術典藏 |
2018-09-10T05:00:09Z |
Parallel graph contraction with applications to a reconfigurable parallel architecture
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Lyuu, Y.-D.;Schenfeld, E.; Lyuu, Y.-D.; Schenfeld, E.; YUH-DAUH LYUU |
| 臺大學術典藏 |
2020-05-04T08:21:25Z |
Parallel Graph Contraction with Applications to a Reconfigurable Parallel Architecture.
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Lyuu, Yuh-Dauh;Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen; YUH-DAUH LYUU |
| 元智大學 |
Jan-20 |
Parallel hardware implementation of data hiding scheme for quality access control of grayscale image based on FPGA
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Amit Phadikar; Himadri Mandal; Tien-Lung Chiu |
顯示項目 649846-649855 / 2348617 (共234862頁)
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每頁顯示[10|25|50]項目
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