| 國立成功大學 |
2018 |
Ultra-Low Standby Power SRAM with Adaptive Data-Retention-Voltage-Regulating Scheme
|
Huang, C.-R.;Wu, K.-L.;Wu, C.-H.;Chiou, L.-Y. |
| 國立交通大學 |
2014-12-08T15:36:13Z |
Ultra-Low Switching Power RRAM Using Hopping Conduction Mechanism
|
Chin, Albert; Cheng, C. H.; Chiu, Y. C.; Zheng, Z. W.; Liu, M. |
| 國立成功大學 |
2016-10 |
Ultra-Low Switching Voltage Induced by Inserting SiO2 Layer in Indium-Tin-Oxide-Based Resistance Random Access Memory
|
Shih, Chih-Cheng; Chen, Wen-Jen; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Chu, Tian-Jian; Tseng, Yi-Ting; Wu, Cheng-Hsien; Su, Wan-Ching; Chen, Min-Chen; Huang, Hui-Chun; Wang, Ming-Hui; Chen, Jung-Hui; Zheng, Jin-Cheng; Sze, Simon M. |
| 國立成功大學 |
2022-01-2 |
Ultra-low temperature sintering and microwave dielectric properties of mg-substituted SrCoV2O7 ceramics
|
Huang;Yu-Ting;Huang;Ching-Cheng;Hsu;Tsung-Hsien;Huang;Cheng-Liang |
| 國立成功大學 |
2021-01-2 |
Ultra-low temperature sintering and temperature stable microwave dielectrics of (Mg1-xZnx)V2O6 (x= 0-0.09) Ceramics
|
Huang;Cheng-Liang;Huang;Jyun-Lin;Tsai;Meng-Hung |
| 國立成功大學 |
2021 |
Ultra-low temperature sintering and temperature stable microwave dielectrics of (Mg1-xZnx)V2O6 (x= 0–0.09) Ceramics
|
Huang, C.-L.;Huang, J.-L.;Tsai, M.-H. |
| 國立成功大學 |
2022-08 |
Ultra-low temperature sintering and temperature stable microwave dielectrics of phase pure AgMgVO4 ceramics
|
Huang;Cheng-Liang;Hsu;Tsung-Hsien |
| 國立交通大學 |
2014-12-08T15:29:40Z |
Ultra-low voltage implicit multiplexed differential flip-flop with enhanced noise immunity
|
Sung, W. -H.; Lee, M. -C.; Chung, C. -C.; Lee, C. -Y. |
| 國立交通大學 |
2018-08-21T05:56:55Z |
Ultra-Low Voltage Mixed TFET-MOSFET 8T SRAM Cell
|
Chen, Yin-Nien; Fan, Ming-Long; Hu, Vita Pi-Ho; Su, Pin; Chuang, Ching-Te |
| 國立交通大學 |
2018-08-21T05:56:43Z |
Ultra-Low Voltage Ripple in DC-DC Boost Converter by the Pumping Capacitor and Wire Inductance Technique
|
Tang, Chen-Fan; Chen, Ke-Horng; Wey, Chin-Long; Lin, Ying-Hsi; Lin, Jian-Ru; Tsai, Tsung-Yen |
| 臺大學術典藏 |
2022-05-24T06:15:49Z |
Ultra-Low-Dose 18F-Florbetaben Amyloid PET Imaging Using Deep Learning with Multi-Contrast MRI Inputs
|
Chen K.T.;Gong E.;de Carvalho Macruz F.B.;Xu J.;Boumis A.;Khalighi M.;Poston K.L.;Sha S.J.;Greicius M.D.;Mormino E.;Pauly J.M.;Srinivas S.;Zaharchuk G.; Chen K.T.; Gong E.; de Carvalho Macruz F.B.; Xu J.; Boumis A.; Khalighi M.; Poston K.L.; Sha S.J.; Greicius M.D.; Mormino E.; Pauly J.M.; Srinivas S.; Zaharchuk G.; TZE-HSIANG CHEN |
| 臺大學術典藏 |
2022-05-24T06:15:49Z |
Ultra-low-dose PET reconstruction using generative adversarial network with feature matching and task-specific perceptual loss
|
Ouyang J.;Chen K.T.;Gong E.;Pauly J.;Zaharchuk G.; Ouyang J.; Chen K.T.; Gong E.; Pauly J.; Zaharchuk G.; TZE-HSIANG CHEN |
| 中原大學 |
2009-03 |
Ultra-low-k thin films of polyhedral oligometric silsesquioxane nanocomposites via covalent layer-by-layer assembly
|
Y.L. Liu; C.S. Liu; W.H. Chen;S.Y. Chen; K.S. Wang;M.J. Hwu |
| 國立交通大學 |
2014-12-08T15:33:12Z |
Ultra-Low-Leakage Power-Rail ESD Clamp Circuit in a 65-nm CMOS Technology
|
Altolaguirre, Federico A.; Ker, Ming-Dou |
| 國立交通大學 |
2019-04-02T06:04:52Z |
Ultra-Low-Leakage Power-Rail ESD Clamp Circuit in a 65-nm CMOS Technology
|
Altolaguirre, Federico A.; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:25:20Z |
Ultra-Low-Leakage Power-Rail ESD Clamp Circuit in Nanoscale Low-Voltage CMOS Process
|
Chiu, Po-Yen; Ker, Ming-Dou; Tsai, Fu-Yi; Chang, Yeong-Jar |
| 義守大學 |
2009 |
Ultra-low-leakage power-rail ESD clamp circuit in nanoscale low-voltage CMOS process
|
Chiu, Po-Yen ; Ker, Ming-Dou ; Tsai, Fu-Yi ; Chang, Yeong-Jar |
| 國立成功大學 |
2023-10-11 |
Ultra-Low-Power and Wide-Operating-Voltage-Window Capacitive Piezotronic Sensor through Coupling of Piezocharges and Depletion Widths for Tactile Sensing
|
Hsiao;Yu-Liang;Jang;Chen;Lin;Yi-Miao;Wang;Chao-Hung;Liu;Chuan-Pu |
| 臺大學術典藏 |
2018-09-10T09:44:04Z |
Ultra-low-power cascaded CMOS LNA with positive feedback and bias optimization
|
Lai, M.-T.;Tsao, H.-W.; Lai, M.-T.; Tsao, H.-W.; HEN-WAI TSAO |
| 臺大學術典藏 |
2018-09-10T05:29:20Z |
Ultra-low-voltage CMOS static frequency divider
|
LIANG-HUNG LU; L.-H. Lu; J.-C. Chien |
| 臺大學術典藏 |
2021-03-12T08:41:06Z |
Ultra-low-voltage CMOS static frequency divider
|
JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN |
| 臺大學術典藏 |
2005-06 |
Ultra-low-voltage mixer and VCO in 0.18-/spl mu/m CMOS
|
Hsieh, Hsieh-Hung; Chung, Kuo-Sheng; Lu, Liang-Hung; Hsieh, Hsieh-Hung; Chung, Kuo-Sheng; Lu, Liang-Hung |
| 國立臺灣大學 |
2005-06 |
Ultra-low-voltage mixer and VCO in 0.18-/spl mu/m CMOS
|
Hsieh, Hsieh-Hung; Chung, Kuo-Sheng; Lu, Liang-Hung |
| 臺大學術典藏 |
2018-09-10T05:29:19Z |
Ultra-low-voltage mixer and VCO in 0.18-um CMOS
|
H.-H. Hsieh; K.-S. Chung; L.-H. Lu; LIANG-HUNG LU |
| 國立高雄師範大學 |
2008-08 |
Ultra-Low-Voltage Phase-Locked Loop with Bulk-Input VCO
|
Yu-Lung Lo;Wei-Bin Yang;Ting-Sheng Chao;Jiunn-Way Miaw;Jing-Shiuan Huang;Kuo-Hsing Cheng; 羅有龍 |
