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顯示項目 91376-91385 / 2351377 (共235138頁)
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| 國立暨南國際大學 |
2009 |
A 2 mW, 55.8-GHz CMOS INJECTION-LOCKED FREQUENCY DIVIDER WITH 7.1-GHz LOCKING RANGE
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陳世璋?; Chen, CZ |
| 國立暨南國際大學 |
2009 |
A 2 mW, 55.8-GHz CMOS INJECTION-LOCKED FREQUENCY DIVIDER WITH 7.1-GHz LOCKING RANGE
|
林佑昇?; Lin, YS |
| 臺大學術典藏 |
2000-08 |
A 2 V clock synchronizer using digital delay-locked loop
|
Hwang, Chorng-Sii; Chung, Wang-Chih; Wang, Chih-Yong; Tsao, Hen-Wai; Liu, Shen-Iuan; Hwang, Chorng-Sii; Chung, Wang-Chih; Wang, Chih-Yong; Tsao, Hen-Wai; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000-08 |
A 2 V clock synchronizer using digital delay-locked loop
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Hwang, Chorng-Sii; Chung, Wang-Chih; Wang, Chih-Yong; Tsao, Hen-Wai; Liu, Shen-Iuan |
| 國立臺灣大學 |
1999-08 |
A 2 V CMOS programmable pipelined digital differential matched filter for DS-CDMA system
|
Yen, She-Hwa; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2010 |
A 2 x 2 Split Cross-Bar Optical Switch Using a Hybrid Actuation Configuration
|
Liao, Bo-Ting; Chia, Bonnie Tingting; Shih, Sun-Chih; Fan, Kuang-Chao; Yang, Yao-Joe Joseph |
| 國立交通大學 |
2017-04-21T06:49:42Z |
A 2 x 20-Gb/s, 1.2-pJ/bit, Time-Interleaved Optical Receiver in 40-nm CMOS
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Huang, Shih-Hao; Hung, Zheng-Hao; Chen, Wei-Zen |
| 臺大學術典藏 |
2020-06-11T07:06:10Z |
A 2 x 25-Gb/s Receiver With 2:5 DMUX for 100-Gb/s Ethernet
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Wu, Ke-Chung;Lee, Jri; Wu, Ke-Chung; Lee, Jri; JRI LEE |
| 國立臺灣科技大學 |
2019 |
A 2 × 2 Monopole Antenna Array for Ceiling-Mount Wireless Access point
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Chou, M.;Ke, J.-F.;Zhang, Zhang Z.-C.;Liao, W.-J. |
| 臺大學術典藏 |
2009 |
A 2 กั 2 mechanical optical switch with a thin MEMS mirror
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Fan, K.-C.; Lin, W.-L.; Chiang, L.-H.; Chen, S.-H.; Chung, T.-T.; Yang, Y.-J.; YAO-JOE YANG |
顯示項目 91376-91385 / 2351377 (共235138頁)
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