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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 917761-917770 / 2351408 (共235141頁) << < 91772 91773 91774 91775 91776 91777 91778 91779 91780 91781 > >> 每頁顯示[10|25|50]項目
| 中原大學 |
2001-10-11 |
VLSI CAD中一些最佳化問題之研究
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林佑政; Yu-Chung Lin |
| 中原大學 |
1989 |
VLSI CAD數位語音系統之設計
|
王如生; WANG, RU-SHENG |
| 國立交通大學 |
2014-12-08T15:03:00Z |
VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes
|
Chang, RI; Hsiao, PY |
| 臺大學術典藏 |
2018-09-10T05:24:37Z |
VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes
|
RAY-I CHANG;HSIAO, PY;CHANG, RI; CHANG, RI; HSIAO, PY; RAY-I CHANG |
| 國立交通大學 |
2014-12-08T15:01:53Z |
VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes - Comments
|
Huang, KY |
| 國立中山大學 |
2001-09 |
VLSI circuit design of 16-Mbps IrDA VFIR transceivers
|
C.C. Wang;C.W. Chen;Y.L. Huang |
| 國立交通大學 |
2014-12-08T15:01:29Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
|
Chang, RI; Hsiao, PY |
| 國立交通大學 |
2019-04-02T05:59:32Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
|
Chang, RI; Hsiao, PY |
| 臺大學術典藏 |
2018-09-10T06:32:26Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
|
RAY-I CHANG;HSIAO, PY;CHANG, RI; CHANG, RI; HSIAO, PY; RAY-I CHANG |
| 臺大學術典藏 |
2018-09-10T08:34:15Z |
VLSI design and implementation of density-based spike classification for neuroprosthetic applications
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Cheng, L.-F.;Chen, T.-C.;Chen, L.-G.; Cheng, L.-F.; Chen, T.-C.; Chen, L.-G.; LIANG-GEE CHEN |
顯示項目 917761-917770 / 2351408 (共235141頁) << < 91772 91773 91774 91775 91776 91777 91778 91779 91780 91781 > >> 每頁顯示[10|25|50]項目
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