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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 436416-436425 / 2346288 (共234629頁)
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每頁顯示[10|25|50]項目
| 朝陽科技大學 |
2021-06 |
FPGA implementation of a lightweight simple encryption scheme to secure IoT using novel key scheduling technique
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Kumar, Kiran, V. G.;Rai, Shantharama, C. |
| 國立臺灣科技大學 |
2014 |
FPGA implementation of A MASH 1-1-1 delta-sigma modulator infractional-N phase locked loop for fuzzy control application
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Lai W.-C., Huang J.-F., Wen C.-L., Lay W.-T. |
| 國立勤益科技大學 |
2009-03 |
FPGA Implementation of a Recurrent Neural Fuzzy Network with On-Chip Learning for Prediction and Identification Applications
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林正堅 |
| 國立勤益科技大學 |
2008-05 |
FPGA implementation of a wavelet neural network with particle swarm optimization learning
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Lin, Cheng-Jian ; Tsai, Hung-Ming |
| 淡江大學 |
2019-05-11 |
FPGA implementation of adaptive Kalman filter for industrial ultrasonic applications
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Li, Shih-AN;Li, Chris |
| 元智大學 |
2012-04-19 |
FPGA Implementation of Alamouti MIMO Log-Likelihood Ratio Selection for Receiver-Antenna Selection Combining
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Peiwang Chow; Yawgeng Chau; Guangliang Ren |
| 元智大學 |
2012-04-19 |
FPGA Implementation of Alamouti MIMO Log-Likelihood Ratio Selection for Receiver-Antenna Selection Combining
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Peiwang Chow; Yawgeng Chau; Guangliang Ren |
| 元智大學 |
2004-08 |
FPGA Implementation of an All-Digital T/2-Spaced QPSK Receiver with Farrow Interpolation Timing Synchronizer and Recursive Costas Loop
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黃正光; C. H. Chu |
| 元智大學 |
2004-08 |
FPGA Implementation of an All-Digital T/2-Spaced QPSK Receiver with Farrow Interpolation Timing Synchronizer and Recursive Costas Loop
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黃正光; C. H. Chu |
| 國立臺灣科技大學 |
2015 |
FPGA implementation of automatic speech recognition system in a car environment
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Syu, D.-F;Syu, Syu S.-W;Ruan, S.-J;Huang, Y.-C;Yang, C.-K. |
顯示項目 436416-436425 / 2346288 (共234629頁)
<< < 43637 43638 43639 43640 43641 43642 43643 43644 43645 43646 > >>
每頁顯示[10|25|50]項目
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