| 中華大學 |
2009 |
Low-Power and High-SFDR Hybrid CORDIC-Based Direct Digital Frequency Synthesizer
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Low-Power and High-Speed Architectures for 2-D DCT and IDCT Based on CORDIC Rotation
|
宋志雲; Sung, Tze-Yun |
| 國立聯合大學 |
2010 |
Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems
|
Sung, TY; Hsin, HC; Cheng, YP |
| 中華大學 |
2010 |
Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems
|
宋志雲; Sung, Tze-Yun |
| 臺大學術典藏 |
2018-09-10T09:24:55Z |
Low-Power and High-Throughput Design of Fast Motion Estimation VLSI Architecture for Multimedia System-on-Chip Design
|
Sy-Yen Kuo;Shih-Chia Huang; Sy-Yen Kuo; Shih-Chia Huang; SY-YEN KUO |
| 國立交通大學 |
2014-12-08T15:28:51Z |
Low-Power and Highly Reliable Multilevel Operation in ZrO(2) 1T1R RRAM
|
Wu, Ming-Chi; Lin, Yi-Wei; Jang, Wen-Yueh; Lin, Chen-Hsi; Tseng, Tseung-Yuen |
| 國立交通大學 |
2019-04-02T05:58:57Z |
Low-Power and Highly Reliable Multilevel Operation in ZrO2 1T1R RRAM
|
Wu, Ming-Chi; Lin, Yi-Wei; Jang, Wen-Yueh; Lin, Chen-Hsi; Tseng, Tseung-Yuen |
| 臺大學術典藏 |
2018-09-10T04:56:07Z |
Low-power and low-complexity DCT/IDCT VLSI architecture based on backward chebyshev recursion
|
Wu, An-Yeu; Liu, K.J.Ray; AN-YEU(ANDY) WU |
| 國立成功大學 |
2019-05 |
Low-Power and Low-Phase-Noise G(m)-Enhanced Current-Reuse Differential Colpitts VCO
|
Cheng;Kuang-Wei;Chang;Sheng-Kai;Huang;Yu-Chieh |
| 國立成功大學 |
2019 |
Low-Power and Low-Phase-Noise Gm-Enhanced Current-Reuse Differential Colpitts VCO
|
Cheng, K.-W.;Chang, S.-K.;Huang, Y.-C. |
| 中華大學 |
2006 |
Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Low-Power and Multiplierless Architectures for Line-Based 2-D DWT and IDWT
|
謝曜式; Shieh, Yaw-Shih |
| 國立交通大學 |
2019-04-02T06:04:41Z |
Low-power and Reference-Less data and clock recovery circuit for visible light receivers
|
Liu, Ming-Cheng; Chao, Paul C. -P.; Khiong, Soh Sze |
| 國立成功大學 |
2009-12 |
Low-Power and Wide-Bandwidth Cyclic ADC With Capacitor and Opamp Reuse Techniques for CMOS Image Sensor Application
|
Lin, Jin-Fu; Chang, Soon-Jyh; Chiu, Chin-Fong; Tsai, Hann-Huei; Wang, Jiann-Jong |
| 國立交通大學 |
2014-12-08T15:01:58Z |
Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids
|
Kuo, Yu-Ting; Lin, Tay-Jyi; Li, Yueh-Tai; Lin, Chou-Kun; Liu, Chih-Wei |
| 國立交通大學 |
2014-12-08T15:25:38Z |
Low-power BIBITS encoding with register relabeling for instruction bus
|
Cheng, CT; Chiao, WH; Shann, JJJ; Chung, CP; Chen, WF |
| 國立交通大學 |
2014-12-08T15:25:28Z |
Low-power branch prediction
|
Hu, YC; Chiao, WH; Shann, JJJ; Chung, CP; Chen, WF |
| 國立臺灣科技大學 |
2014 |
Low-power buffer with voltage boosting and improved frequency compensation for liquid crystal display source drivers
|
Liu, P.-J.;Ting, C.-Y. |
| 國立中山大學 |
2005-8 |
Low-power bus driver design based on a charge recycle technique
|
C.C. Wang;J.M. Huang;Y.M. Tseng |
| 國立成功大學 |
2008-02 |
Low-power circuit techniques for low-voltage pipelined ADCs based on switched-opamp architecture
|
Ou, Hsin-Hung; Chang, Soon-Jyh; Liu, Bin-Da |
| 國立臺灣大學 |
1999 |
Low-power clock-deskew buffer for high-speed digital circuits
|
Liu, Shen-Iuan; Lee, Jiunn-Hwa; Tsao, Hen-Wai |
| 臺大學術典藏 |
2018-09-10T07:41:56Z |
Low-power clock-deskew buffer for high-speed digital circuits
|
Shen-Iuan Liu; Jiunn-Hwa Lee; Hen-Wai Tsao; HEN-WAI TSAO; SHEN-IUAN LIU |
| 國立交通大學 |
2018-08-21T05:56:49Z |
Low-Power CMOS Bandpass Filter for Application of Cochlear Prosthesis
|
Chu, Hsing-Chien; Huang, Yu-Hua; Hung, Chung-Chih |
| 元智大學 |
2017-06-29 |
Low-Power CMOS LNA 900-MHz LoRa Application Through Parallel-RC Feedback
|
Cheng-Shian Shiau; Jeng-Rern Yang |
| 元智大學 |
2017-06-29 |
Low-Power CMOS LNA 900-MHz LoRa Application Through Parallel-RC Feedback
|
Cheng-Shian Shiau; Jeng-Rern Yang |
