English  |  正體中文  |  简体中文  |  2856704  
???header.visitor??? :  53803330    ???header.onlineuser??? :  3328
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

???jsp.browse.items-by-title.jump??? [ ???jsp.browse.general.jump2chinese??? ] [ ???jsp.browse.general.jump2numbers??? ] [ A B C D E F G H I J K L M N O P Q R S T U V W X Y Z ]
???jsp.browse.items-by-title.enter???   

Showing items 658971-658980 of 2349128  (234913 Page(s) Totally)
<< < 65893 65894 65895 65896 65897 65898 65899 65900 65901 65902 > >>
View [10|25|50] records per page

Institution Date Title Author
國立交通大學 2014-12-08T15:07:08Z Performance-based workload distribution on grid environments Shih, Wen-Chung; Yang, Chao-Tung; Chen, Tsui-Ting; Tseng, Shian-Shyong
亞洲大學 2007-05 Performance-based Workload Distribution on Grid Environments 曾憲雄;Tseng, Shian-Shyong
東海大學 2007 Performance-based workload distribution on grid environments Shih W.-C., Yang C.-T., Chen T.-T., Tseng S.-S.
國立交通大學 2017-04-21T06:56:47Z Performance-Complexity Analysis for MAC ML-Based Decoding With User Selection Lu, Hsiao-feng; Elia, Petros; Singh, Arun Kumar
國立交通大學 2014-12-08T15:08:09Z Performance-Constrained Voltage Assignment in Multiple Supply Voltage SoC Floorplanning Wu, Meng-Chen; Lu, Ming-Ching; Chen, Hung-Ming; Jou, Jing-Yang
南台科技大學 1995-01 Performance-Directed Compaction for VLSI Symbolic Layout Lih-Yang Wang; Yen-Tai Lai; Bin-Da Liu; Ting-Chun Chang;王立洋
國立成功大學 2012-11 Performance-driven Analog Placement Considering Monotonic Current Paths Wu, Po-Hsun; Lin, Mark Po-Hung; Chen, Yang-Ru; Chou, Bing-Shiun; Chen, Tung-Chieh; Ho, Tsung-Yi; Liu, Bin-Da
國立交通大學 2014-12-08T15:21:46Z Performance-Driven Architectural Synthesis for Distributed Register-File Microarchitecture Considering Inter-Island Delay Huang, Juinn-Dar; Chen, Chia-I; Hsu, Wan-Ling; Lin, Yen-Ting; Jou, Jing-Yang
國立交通大學 2014-12-08T15:22:04Z Performance-Driven Architectural Synthesis for Distributed Register-File Microarchitecture with Inter-Island Delay Huang, Juinn-Dar; Chen, Chia-I; Hsu, Wan-Ling; Lin, Yen-Ting; Jou, Jing-Yang
元智大學 2009-04 Performance-driven dual-rail insertion for chip-level pre-fabricated design 陳福偉; 劉一宇

Showing items 658971-658980 of 2349128  (234913 Page(s) Totally)
<< < 65893 65894 65895 65896 65897 65898 65899 65900 65901 65902 > >>
View [10|25|50] records per page