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顯示項目 90616-90640 / 2346788 (共93872頁)
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機構 日期 題名 作者
國立臺灣科技大學 2009 A 0.35弮m CMOS divide-by-3 LC injection-locked frequency divider Jang S.-L.; Huang C.-J.; Liu C.-C.
臺大學術典藏 2019-10-24T07:27:59Z A 0.38-V, sub-mW 5-GHz low noise amplifier with 43.6% bandwidth for next generation radio astronomical receivers in 90-nm CMOS 王暉;HUEI WANG;Huei Wang;Yu-Hsuan Lin;Chau-Ching Chiong;Ying Chen; Ying Chen; Chau-Ching Chiong; Yu-Hsuan Lin; Huei Wang; HUEI WANG; 王暉
國立交通大學 2020-07-01T05:22:04Z A 0.3V 10b 3MS/s SAR ADC With Comparator Calibration and Kickback Noise Reduction for Biomedical Applications Wang, Shih-Hsing; Hung, Chung-Chih
臺大學術典藏 2020-06-11T06:34:48Z A 0.3V 10bit 7.3fJ/conversion-step SAR ADC in 0.18μm CMOS Hsieh, C.-E.;Liu, S.-I.; Hsieh, C.-E.; Liu, S.-I.; SHEN-IUAN LIU
淡江大學 2012-07-15 A 0.3V 1kb Sub-Threshold SRAM for Ultra-Low-Power Application in 90nm CMOS Yang, Wei-Bin
元智大學 2020/7/28 A 0.3V, 625Mbps LVDS Driver in 0.18um CMOS Technology Hungwen Lin; Tzu-Hao Lin
臺大學術典藏 2018-09-10T08:15:03Z A 0.4-6 GHz variable-gain driver amplifier for software-defined radio Lin, K.-T.; Chen, H.-K.; Wang, T.; Lu, S.-S.; SHEY-SHI LU
國立成功大學 2022 A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual- Aliasing Reduction Qiu, Y.-Z.;Chien, S.-H.;Kuo, T.-H.
國立成功大學 2022-02 A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual-Aliasing Reduction Qiu;Yi-Zhi;Chien;Shih-Hsiung;Kuo;Tai-Haur
國立成功大學 2020 A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing Reduction Chien, S.-H.;Kuo, T.-H.;Huang, Huang H.-Y.;Wang, H.-B.;Qiu, Y.-Z.
國立交通大學 2017-04-21T06:48:47Z A 0.42V Vccmin ASIC-Compatible Pulse-Latch Solution as a Replacement for a Traditional Master-Slave Flip-Flop in a Digital SOC Dhong, Sang; Guo, Richard; Kuo, Ming-Zhang; Yang, Ping-Lin; Lin, Cheng-Chung; Huang, Kevin; Wang, Min-Jer; Hwang, Wei
臺大學術典藏 2020-06-11T06:34:47Z A 0.43pJ/bit true random number generator Kuan, T.-K.;Chiang, Y.-H.;Liu, S.-I.; Kuan, T.-K.; Chiang, Y.-H.; Liu, S.-I.; SHEN-IUAN LIU
國立交通大學 2016-03-28T00:05:45Z A 0.48V 0.57nJ/Pixel Video-Recording SoC in 65nm CMOS Lin, Tay-Jyi; Chien, Cheng-An; Chang, Pei-Yao; Chen, Ching-Wen; Wang, Po-Hao; Shyu, Ting-Yu; Chou, Chien-Yung; Luo, Shien-Chun; Guo, Jiun-In; Chen, Tien-Fu; Chuang, Gene C. H.; Chu, Yuan-Hua; Cheng, Liang-Chia; Su, Hong-Men; Jou, Chewnpu; Ieong, Meikei; Wu, Cheng-Wen; Wang, Jinn-Shyan
國立交通大學 2018-08-21T05:56:39Z A 0.4V 53dB SNDR 250 MS/s Time-Based CT Delta Sigma Analog to Digital Converter Chen, Hung-Kai; Chen, Wei-Zen; Ren Zhiyuan
南台科技大學 2007-11 A 0.5 mm Carbon Nanotube Field Emission Source Max Chung; Chih Chia Chang; Bohr Ran Huang
國立成功大學 2002-09 A 0.5 mu m concurrent testable chip of a fifth-order g(m)-C filter Lee, Kuen-Jong; Wang, Wei-Chiang
淡江大學 2011-01 A 0.5 V 320 MHz 8 bit×8 bit pipelined multiplier in 130 nm CMOS process Yang, Wei-Bin; Liao, Chao-Cheng; Liang, Yung-Chih
國立交通大學 2014-12-08T15:40:05Z A 0.5 V 4.85 Mbps Dual-Mode Baseband Transceiver With Extended Frequency Calibration for Biotelemetry Applications Chen, Tsan-Wen; Yu, Jui-Yuan; Yu, Chien-Ying; Lee, Chen-Yi
國立高雄師範大學 2009-08 A 0.5 V Phase-Locked Loop in 90nm CMOS Process Kuo-Hsing Cheng;Jing-Shiuan Huang;Yu-Chang Tsai;Chao-Chang Chiu;Yu-Lung Lo; 羅有龍
臺大學術典藏 2003-06 A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei; Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei
國立臺灣大學 2003-06 A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei
元智大學 2016-06-23 A 0.5-3.5GHZ Wideband CMOS LNA for LTE Application Wei-Rern Liao; Jeng-Rern Yang
國立高雄師範大學 2011-03 A 0.5-V 0.4–2.24-GHz Inductorless Phase-Locked Loop in a System-on-Chip Kuo-Hsing Chen;Yu-Chang Tsai;Yu-Lung Lo;Jing-Shiuan Huang; 羅有龍
國立交通大學 2018-08-21T05:54:15Z A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist Wu, Shang-Lin; Li, Kuang-Yu; Huang, Po-Tsang; Hwang, Wei; Tu, Ming-Hsien; Lung, Sheng-Chi; Peng, Wei-Sheng; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te
臺大學術典藏 2019-10-24T08:43:09Z A 0.5-V 400-MHz Transceiver Using Injection-Locked Techniques in 180-nm CMOS 林宗賢;TSUNG-HSIEN LIN;T.-H. Lin;Y.-L. Tsai;T.-W. Wang;C.-R. Lee; C.-R. Lee; T.-W. Wang; Y.-L. Tsai; T.-H. Lin; TSUNG-HSIEN LIN; 林宗賢

顯示項目 90616-90640 / 2346788 (共93872頁)
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