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顯示項目 908141-908150 / 2314895 (共231490頁)
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| 臺大學術典藏 |
2018-09-10T06:54:39Z |
VLSI implementation of the motion estimator with two-dimensional data-reuse
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Lai, Y.-K.; Lai, Y.-L.; Liu, Y.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立中山大學 |
1998-02 |
VLSI Implementation of the Quadratic-Spline W-Transform for Multi-resolution Image Processing
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Shen-Fu Hsiao |
| 國立聯合大學 |
2004 |
VLSI Implementation of the Universal 2-D CAT/ICAT System (EI)
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陳榮堅, 賴瑞麟 |
| 國立臺灣大學 |
1999-06 |
VLSI Implementation of Timing Recovery and Carrier Recovery for QAM/VSB Dual Mode
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Shyh-Jye; Kua, G. H.; Shiue, Muh-Tian; Heh, Jung-Yu; 汪重光; Shyh-Jye; Kua, G. H.; Shiue, Muh-Tian; Heh, Jung-Yu; Wang, C. K. |
| 臺大學術典藏 |
2018-09-10T06:54:39Z |
VLSI implementation of visual block pattern truncation coding
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Liu, Y.-C.; Lai, Y.-K.; Tsai, T.-H.; Wu, P.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立中山大學 |
1994-08 |
VLSI Implementations of an Error-Correcting Encoder/Decoder
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Shen-Fu Hsiao |
| 元智大學 |
2017-07-02 |
VLSI implementations of parallel dual-mode MAP decoding for iterative detection and decoding receiver
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Ching-Wen Hsieh; Cheng-Hung Lin |
| 國立中山大學 |
1997-12 |
VLSI implemnetation of a word-slice pipelined maximum selector for priority queues
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C.C. Wang;G.C. Lin |
| 國立交通大學 |
2014-12-08T15:04:36Z |
VLSI NEUROPROCESSORS FOR VIDEO MOTION DETECTION
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LEE, JC; SHEU, BJ; FANG, WC; CHELLAPPA, R |
| 臺大學術典藏 |
2018-09-10T07:44:18Z |
VLSI Process Control
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RUEY-SHAN GUO;K. Wong;A. Hu;S. Ha;E. Sachs; RUEY-SHAN GUO; K. Wong; A. Hu; S. Ha; E. Sachs; RUEY-SHAN GUO |
顯示項目 908141-908150 / 2314895 (共231490頁)
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