| 南台科技大學 |
2003 |
A Clustering-based Approach for Supporting Document-category Integration
|
C. Wei ; T. H. Cheng |
| 淡江大學 |
1999-06 |
A clustering-based method for fuzzy modeling
|
翁慶昌; Wong, Ching-chang; Chen, Chia-chong |
| 元智大學 |
2008-05 |
A clustering-oriented star coordinate translation method for reliable clustering parameterization
|
蔡介元; Chiu, Chuang-Cheng |
| 亞洲大學 |
2010-06 |
A CMC-Based Design Communication for Collaborative Design Projects
|
HUNG-WEN HSU;HSIEN-JUNG WU;HSING-CHUNG KAO |
| 亞洲大學 |
2010-06 |
A CMC-Based Design Communication for Collaborative Design Projects
|
徐宏文;Hsu, Hung-Wen;吳銜容;Wu, Hsien-Jung;Kao, Hsing-Chung |
| 亞洲大學 |
2010 |
A CMC-Based Design Communication Model - A Case Study Using Typhoon Warning Briefing System
|
Hsing-Chuan Kao |
| 國立政治大學 |
2010-09 |
A CMM Assessment of Information Systems Maturity Levels in Botswana
|
Uzoka, Faith-Michael E. |
| 亞洲大學 |
2012 |
A CMMI-based Mechanism for Teacher Performance Appraisal Process Improvement of Elementary School
|
Lin, Chin-Chui |
| 國立交通大學 |
2014-12-08T15:34:51Z |
A CMOS 13.56-MHz High-Efficiency Low-Dropout-Voltage 40-mW Inductive Link Power Supply Utilizing On-Chip Delay-Compensated Voltage Doubler Rectifier and Multiple LDOs for Implantable Medical Devices
|
Qian, Xin-Hong; Cheng, Ming-Seng; Wu, Chung-Yu |
| 國立交通大學 |
2014-12-08T15:05:23Z |
A CMOS 15-bit 125-MS/s time-interleaved ADC with digital background calibration
|
Lee, Zwei-Mei; Wang, Cheng-Yeh; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:24:43Z |
A CMOS 15-bit 125-MS/s time-interleaved ADC with digital background. calibration
|
Lee, Zwei-Mei; Wang, Cheng-Yeh; Wu, Jieh-Tsorng |
| 國立交通大學 |
2018-08-21T05:53:37Z |
A CMOS 256-pixel Photovoltaics-powered Implantable Chip with Active Pixel Sensors and Iridium-oxide Electrodes for Subretinal Prostheses
|
Wu, Chung-Yu; Kuo, Po-Han; Lin, Po-Kang; Chen, Po-Chun; Sung, Wei-Jie; Ohta, Jun; Tokuda, Takashi; Noda, Toshihiko |
| 國立交通大學 |
2020-10-05T02:02:21Z |
A CMOS 256-Pixel Self-Photovoltaics-Powered Subretinal Prosthetic Chip with Wide Image Dynamic Range and Shared Electrodes and Its In Vitro Experimental Results on Rd1 Mice
|
Wu, Chung-Yu; Tzeng, Chi-Kuan; Huang, Shih-Yun; Chu, Fang-Liang; Chiao, Chuan-Chin; Tsai, Yueh-Chun; Ohta, Jun; Noda, Toshihiko |
| 國立交通大學 |
2014-12-08T15:40:13Z |
A CMOS 33-mW 100-MHz 80-dB SFDR sample-and-hold amplifier
|
Hsu, CC; Wu, JT |
| 國立交通大學 |
2019-04-02T06:04:42Z |
A CMOS 33-mW 100-MHz 80-dB SFDR sample-and-hold amplifier
|
Hsu, CC; Wu, HT |
| 國立臺灣大學 |
2001 |
A CMOS 400-Mb/s serial link for AS-memory systems using a PWMscheme
|
Chen, Wei-Hung; Dehang, Guang-Kaai; Chen, Jong-Woei; Liu, Shen-Iuan |
| 國立臺灣大學 |
2007 |
A CMOS 5-bit 5GSample/sec analog-to-digital converter in 0.13um CMOS
|
Wang, I-Hsin; Liu, Shen-Iuan |
| 臺大學術典藏 |
2005-06 |
A CMOS 5-GHz micro-power LNA
|
Hsieh, Hsieh-Hung; Lu, Liang-Hung; Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立臺灣大學 |
2005-06 |
A CMOS 5-GHz micro-power LNA
|
Hsieh, Hsieh-Hung; Lu, Liang-Hung |
| 國立交通大學 |
2014-12-08T15:28:51Z |
A CMOS 5.37-mW 10-Bit 200-MS/s Dual-Path Pipelined ADC
|
Chai, Yun; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:11:50Z |
A CMOS 6-Bit 16-GS/s Time-Interleaved ADC Using Digital Background Calibration Techniques
|
Huang, Chun-Cheng; Wang, Chung-Yi; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:39:30Z |
A CMOS 6-Bit 16-GS/s Time-Interleaved ADC with Digital Background Calibration
|
Huang, Chun-Cheng; Wang, Chung-Yi; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:07:13Z |
A CMOS 6-mW 10-bit 100-MS/s Two-Step ADC
|
Chung, Yung-Hui; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:21:05Z |
A CMOS 6-mW 10-bit 100-MS/s Two-Step ADC
|
Chung, Yung-Hui; Wu, Jieh-Tsorng |
| 國立交通大學 |
2014-12-08T15:18:10Z |
A CMOS bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device
|
Kew, MD; Chen, JS; Chu, CY |
