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Institution	Date	Title	Author
淡江大學	2001-09	A 1.2 V 500 MHz 32-bit carry-lookahead adder	鄭國興; Cheng, Kuo-hsing; Lee, Wen-shiuan; Huang, Yung-chong
國立交通大學	2014-12-08T15:27:23Z	A 1.2 V CMOS four-quadrant analog multiplier	Hsiao, SY; Wu, CY
淡江大學	1996-10-13	A 1.2 V CMOS multiplier using low-power current-sensing complementary pass-transistor logic	鄭國興; Cheng, Kuo-hsing; Yee, Liow yu
淡江大學	1997-12-15	A 1.2 V low-power TSPC complementary pass transistor logic	鄭國興; Cheng, Kuo-hsing; Chen, Jian-hung
國立成功大學	2002-09	A 1.2 V rail-to-rail analog CMOS rank-order filter with k-WTA capability	Hung, Yu-Cherng; Liu, Bin-Da
國立臺灣大學	2007	A 1.2-V 37–38.5-GHz Eight-Phase Clock Generator in 0.13- μm CMOS Technology	Cho, Lan-Chou; Lee, Chihun; Liu, Shen-Iuan
國立交通大學	2014-12-08T15:28:31Z	A 1.2-V 5.2-mW 20-30-GHz Wideband Receiver Front-End in 0.18-mu m CMOS	Li, Chun-Hsing; Kuo, Chien-Nan; Kuo, Ming-Ching
臺大學術典藏	2020-08-05T02:45:27Z	A 1.2-V 5.2-mW 20-30-GHz wideband receiver front-end in 0.18-μm CMOS	Chun-Hsing Li; Chien-Nan Kuo; and Ming-Ching Kuo; CHUN-HSING LI; CHUN-HSING LI
臺大學術典藏	2018-09-10T14:53:48Z	A 1.2-V 90-nm fully integrated compact CMOS linear power amplifier using the coupled l-shape concentric vortical transformer	Yang, H.-S.;Chen, J.-H.;Chen, Y.-J.E.; Yang, H.-S.; Chen, J.-H.; Chen, Y.-J.E.; YI-JAN EMERY CHEN
臺大學術典藏	2020-01-17T07:44:51Z	A 1.2-V 90-nm fully integrated compact CMOS linear power amplifier using the coupled l-shape concentric vortical transformer	Yang, H.-S.; Chen, J.-H.; Chen, Y.-J.E.; JAU-HORNG CHEN

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