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Institution	Date	Title	Author
國立臺灣大學	2007	A 10-Gb/s inductorless CMOS limiting amplifier with third-order interleaving active feedback	Huang, Huei-Yan; Chien, Jun-Chau; Lu, Liang-Hung
臺大學術典藏	2021-03-12T08:41:03Z	A 10-Gb/s Inductorless CMOS Limiting Amplifier with Third-Order Interleaving Active Feedback	JUN-CHAU CHIEN; 簡俊超; JUN-CHAU CHIEN
國立交通大學	2014-12-08T15:25:38Z	A 10-Gb/s laser diode driver in 0.35 mu m BiCMOS technology	Wang, TY; Chen, WZ; Tsai, CM; Huang, LR; Li, DU
國立交通大學	2014-12-08T15:47:46Z	A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18-mu m CMOS Technology	Huang, Shih-Hao; Chen, Wei-Zen; Chang, Yu-Wei; Huang, Yang-Tung
國立交通大學	2015-07-21T08:28:41Z	A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression	Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsiang; Lee, Chao-Cheng; Jou, Shyh-Jye
國立交通大學	2014-12-08T15:20:15Z	A 10-Gbps CMOS Single Chip Optical Receiver with 2-D Meshed Spatially-Modulated Light Detector	Huang, Shih-Hao; Chen, Wei-Zen
臺大學術典藏	2018-09-10T05:29:26Z	A 10-GHz CMOS PLL with an Agile VCO Calibration	Y.-J. Lai; T.-H Lin; TSUNG-HSIEN LIN
國立臺灣科技大學	2014	A 10-GHz low power CMOS voltage controlled oscillator chip design for wireless application	Lai W.-C., Huang J.-F., Hsu C.-M., Lay W.-T.
國立成功大學	2021-10	A 10-GS/s NRZ/Mixing DAC With Switching-Glitch Compensation Achieving SFDR > 64/50 dBc Over the First/Second Nyquist Zone	Huang;Hung-Yi;Chen;Xin-Yu;Kuo;Tai-Haur
國立成功大學	2021	A 10-GS/s NRZ/Mixing DAC with Switching-Glitch Compensation Achieving SFDR >64/50 dBc over the First/Second Nyquist Zone	Huang, Huang H.-Y.;Chen, X.-Y.;Kuo, T.-H.

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