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Taiwan Academic Institutional Repository >
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Showing items 916716-916740 of 2348419 (93937 Page(s) Totally)
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| 國立成功大學 |
2024 |
VLSI Design of Programmable Bootstrapping for Torus Fully Homomorphic Encryption
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Yang;T, -S.;Wu;Q, -X.;Shieh;M, -D.;Tsai;T, -H. |
| 臺大學術典藏 |
2007 |
VLSI DESIGN OF WAVELET TRANSFORM, ANALYSIS, ARCHITECTURE, AND DESIGN EXAMPLES
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Chen, Liang-Gee; Huang, Chao-Tsung; Chen, Ching-Yeh; Cheng, Chih-Chi; Chen, Liang-Gee; Huang, Chao-Tsung; Chen, Ching-Yeh; Cheng, Chih-Chi |
| 國立臺灣大學 |
2007 |
VLSI DESIGN OF WAVELET TRANSFORM, ANALYSIS, ARCHITECTURE, AND DESIGN EXAMPLES
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Chen, Liang-Gee; Huang, Chao-Tsung; Chen, Ching-Yeh; Cheng, Chih-Chi |
| 國立交通大學 |
2014-12-08T15:26:27Z |
VLSI implememtation for MAC-level DWT architecture
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Huang, SR; Dung, LR |
| 國立成功大學 |
2019 |
VLSI Implementation for an Adaptive Haze Removal Method
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Kuo;Yao-Tsung;Chen;Wei-Ting;Chen;Pei-Yin;Li;Cheng-Hsien |
| 國立交通大學 |
2014-12-08T15:36:44Z |
VLSI implementation for Epileptic Seizure Prediction System based on Wavelet and Chaos Theory
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Hung, Shao-Hang; Chao, Chih-Feng; Wang, Shu-Kai; Lin, Bor-Shyh; Lin, Chin-Teng |
| 中華大學 |
2006 |
VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of 2-D Discrete Cosine Transform Architecture Based on CORDIC Rotation,
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謝曜式; Shieh, Yaw-Shih |
| 臺大學術典藏 |
2018-09-10T06:30:42Z |
VLSI implementation of 2-D discrete wavelet transform for real-time video signal processing
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Yu, C.; Chen, S.-J.; SAO-JIE CHEN |
| 中華大學 |
2005 |
VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2005 |
VLSI Implementation of a CORDIC-Based 2-D Discrete Cosine Transform and Its Inverse
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林國珍; Lin, Kuo-Jen |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient and Cost-Effective LCD Signal Processor
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of a High-Efficient and Cost-Effective LCD Singal Processor,
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謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
VLSI Implementation of A High-Efficient Image Scalar Algorithm for LCD Signal Processor
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謝曜式; Shieh, Yaw-Shih |
| 國立中山大學 |
1997-06 |
VLSI Implementation of a High-Throughput CORDIC Processor for Both Angle Calculation and Vector Rotation
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Shen-Fu Hsiao; Jen-Yin Chen |
| 國立交通大學 |
2014-12-08T15:35:45Z |
VLSI Implementation of a Low Complexity 4x4 MIMO Sphere Decoder with Table Enumeration
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Yang, Kai-Jiun; Tsai, Shang-Ho; Chang, Ruei-Ching; Chen, Yan-Cheng; Chuang, Gene C. -H. |
| 中華大學 |
2005 |
VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFF Processor for Wireless LAN
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林國珍; Lin, Kuo-Jen |
| 中華大學 |
2005 |
VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
VLSI Implementation of a Memory-Efficient and High-Speed Split-Radix FFT/IFFT Processor for Wireless LAN
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謝曜式; Shieh, Yaw-Shih |
| 國立交通大學 |
2014-12-08T15:20:30Z |
VLSI Implementation of a Mixed Bio-signal Lossless Data Compressor for Portable Brain-Heart Monitoring Systems
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Chua, Ericson; Fu, Chih-Chung; Fang, Wai-Chi |
| 國立成功大學 |
2006-12 |
VLSI implementation of a modified efficient SPIHT encoder
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Huang, Win-Bin; Su, Alvin W. Y.; Kuo, Yau-Hwang |
| 臺大學術典藏 |
2018-09-10T05:50:34Z |
Vlsi implementation of a selective median filter
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Chen, C.-T.; Chen, L.-G.; Hsiao, J.-H.; LIANG-GEE CHEN |
| 國立成功大學 |
2009-09 |
VLSI Implementation of an Edge-Oriented Image Scaling Processor
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Chen, Pei-Yin; Lien, Chih-Yuan; Lu, Chi-Pin |
Showing items 916716-916740 of 2348419 (93937 Page(s) Totally)
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