| 國立交通大學 |
2019-08-02T02:18:31Z |
A 4.2 nW and 18 ppm/degrees C Temperature Coefficient Leakage-Based Square Root Compensation (LSRC) CMOS Voltage Reference
|
Huang, Chao-Jen; Lai, Yan-Jiun; Yang, Yu-Jheng Ou; Chen, Hung-Wei; Kuo, Chun-Chieh; Chen, Ke-Horng; Lin, Ying-Hsi; Lin, Shian-Ru; Tsai, Tsung-Yen |
| 臺大學術典藏 |
2020-06-11T06:31:48Z |
A 4.328.64-GHz receiver front-end with variable gain amplifier and I/Q mixer for 60-GHz heterodyne system in 65nm CMOS technology
|
Cheng, J.-H.;Lin, J.-A.;Huang, T.-W.;Tsai, J.-H.; Cheng, J.-H.; Lin, J.-A.; Huang, T.-W.; Tsai, J.-H.; TIAN-WEI HUANG |
| 臺大學術典藏 |
2020-06-04T07:54:16Z |
A 4.6-GHz Class-F -1 high power CMOS power amplifier
|
Chen, F.;Wang, Y.;Hsiao, Y.-H.;Lin, J.-L.;Chen, Y.-C.;Wang, H.; Chen, F.; Wang, Y.; Hsiao, Y.-H.; Lin, J.-L.; Chen, Y.-C.; Wang, H.; HUEI WANG |
| 臺大學術典藏 |
2018-09-10T09:50:31Z |
A 4.8-GHz Dividerless Subharmonically Injection-Locked All-Digital PLL With a FOM of-252.5 dB
|
I-Ting Lee;Kai-Hui Zeng;Shen-Iuan Liu; I-Ting Lee; Kai-Hui Zeng; Shen-Iuan Liu; SHEN-IUAN LIU |
| 國立成功大學 |
2017 |
A 4.86 mW 15-bit 22.5 MS/s pipelined ADC with 74 dB SNDR in 90 nm CMOS using averaging correlated level shifting technique
|
Hung, T.-C.;Kuo, T.-H. |
| 國立交通大學 |
2014-12-08T15:30:05Z |
A 4.88 mu W ECG Delineator Using Wavelet Transform for Mobile Healthcare Application
|
Chang, Po-Yao; Hsu, Shu-Yu; Lee, Chen-Yi |
| 國立臺灣科技大學 |
2006-04 |
A 4.8GHz Low-Phase Noise Quadrature Colpitts VCO
|
Sheng-Lyang Jang;Yun-Hsueh Chuang;Chien-Keng Lee;Shao-Hua Lee |
| 國立臺灣科技大學 |
2007 |
A 4.8GHz low-phase noise quadrature colpitts VCO
|
Jang S.-L.; Chuang Y.-H.; Lee C.-F.; Lee S.-H. |
| 國立臺灣科技大學 |
2017 |
A 4.9 GHz low phase noise QVCO using ring coupling technique and used for wireless band application
|
Lai, W.-C;Jang, S.-L;Shyh-Shyang, Shyh-Shyang S;Ho-Chang, L;Yen-Jung, S. |
| 臺大學術典藏 |
2018-09-10T08:15:03Z |
A 4.9-dB NF 53.5-62-GHz micro-machined CMOS wideband LNA with small group-delay-variation
|
Chen, C.-C.; Lin, Y.-S.; Huang, P.-L.; Chang, J.-F.; Lu, S.-S.; SHEY-SHI LU |
| 國立暨南國際大學 |
2010 |
A 4.9-dB NF 53.5-to 62-GHz MICROMACHINED CMOS WIDEBAND LNA WITH SMALL GROUP-DELAY-VARIATION
|
陳志成?; Chen, CC |
| 國立暨南國際大學 |
2010 |
A 4.9-dB NF 53.5-to 62-GHz MICROMACHINED CMOS WIDEBAND LNA WITH SMALL GROUP-DELAY-VARIATION
|
林佑昇?; Lin, YS |
| 臺大學術典藏 |
2018-09-10T04:59:55Z |
A 4.92-5.845GHz Direct-Conversion CMOS Transceiver for IEEE 802.11a Wireless LAN
|
E. Lin; K. Carter; M. Kappes; Z.M. Shi; L. Lin; S. Wu; S. An; ; T. Nguyen; D. Yuan; Y.C. Wong; V. Fong; B. Yeung; A. Rofougaran; A. Behzad; TSUNG-HSIEN LIN et al. |
| 國立臺灣科技大學 |
2016 |
A 4.9GHz low power QVCO using injection locked techniques for wireless wearable applications
|
Lai, W.-C;Jang, S.-L;Su, Su S.-S. |
| 國立交通大學 |
2019-04-02T06:04:37Z |
A 40 Gb/s PAM-4 Receiver with 2-Tap DFE Based on Automatically Non-Even Level Tracking
|
Hung, Chia-Tse; Huang, Yu-Ping; Chen, Wei-Zen |
| 國立交通大學 |
2014-12-08T15:30:06Z |
A 40 Gbps Optical Receiver Analog Front-End in 65 nm CMOS
|
Chou, Shun-Tien; Huang, Shih-Hao; Hong, Zheng-Hao; Chen, Wei-Zen |
| 國立交通大學 |
2014-12-08T15:08:35Z |
A 40 mW 3 Gb/s Self-Compensated Differential Transimpedance Amplifier With Enlarged Input Capacitance Tolerance in 0.18 mu m CMOS Technology
|
Tsai, Chia-Ming |
| 國立交通大學 |
2014-12-08T15:36:13Z |
A 40 nm 0.32 V 3.5 MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-Assist
|
Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2015-07-21T11:20:58Z |
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
|
Lien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:32:53Z |
A 40 nm 535 Mbps Multiple Code-Rate Turbo Decoder Chip Using Reciprocal Dual Trellis
|
Lin, Chen-Yang; Wong, Cheng-Chi; Chang, Hsie-Chia |
| 國立交通大學 |
2017-04-21T06:48:17Z |
A 40 nm 535 Mbps Multiple Code-Rate Turbo Decoder Chip Using Reciprocal Dual Trellis
|
Lin, Chen-Yang; Wong, Cheng-Chi; Chang, Hsie-Chia |
| 國立成功大學 |
2007-02 |
A 40 to 9001 MHz CMOS broadband differential LNA for a DTV RF tuner
|
Chuang, Huey-Ru; Chuang, Huey-Ru; Chu, Y. K.; Lu, C. L. |
| 國立成功大學 |
2015-05 |
A 40-110 GHz High-Isolation CMOS Traveling-Wave T/R Switch by Using Parallel Inductor
|
Lai, Wen-Chian; Chuang, Huey-Ru |
| 國立臺灣大學 |
2007 |
A 40-550 MHz Harmonic-Free All-Digital Delay-Locked Loop Using a Variable SAR Algorithm
|
Yang, Rong-Jyi; Liu, Shen-Iuan |
| 臺大學術典藏 |
2018-09-10T07:08:34Z |
A 40-Gb/s CMOS serial-link receiver with adaptive equalization and clock/data recovery
|
Chih-Fan Liao;Shen-Iuan Liu; Chih-Fan Liao; Shen-Iuan Liu; SHEN-IUAN LIU |
