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教育部委托研究计画 计画执行:国立台湾大学图书馆
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显示项目 90696-90705 / 2348419 (共234842页)
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每页显示[10|25|50]项目
| 臺大學術典藏 |
2002-08 |
A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture
|
Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan; Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan |
| 國立臺灣大學 |
2002-08 |
A 0.8 V switched-opamp bandpass /spl Delta//spl Sigma/ modulator using a two-path architecture
|
Chang, Hsiang-Hui; Chen, Shang-Ping; Cheng, Kuang-Wei; Liu, Shen-Iuan |
| 臺大學術典藏 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
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Liu, Tsung-Te; Wang, Chorng-Kuang; Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立臺灣大學 |
2004-09 |
A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator
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Liu, Tsung-Te; Wang, Chorng-Kuang |
| 國立成功大學 |
2022-10 |
A 0.8-mu W and 74-dB High-Pass Sigma-Delta Modulator With OPAMP Sharing and Noise-Coupling Techniques for Biomedical Signal Acquisition
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Lee;Shuenn-Yuh;Lee;Hao-Yun;Kung;Chia-Ho;Su;Po-Han;Chen;Ju-Yi |
| 國立臺灣大學 |
2008 |
A 0.8-mW 55-GHz dual-injection-locked CMOS frequency divider
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Luo, Tang-Nian; Chen, Yi-Jan Emery |
| 臺大學術典藏 |
2018-09-10T06:37:55Z |
A 0.8-V 0.25-mW Current-Mirror OTA with 160-MHz GBW in 0.18-um CMOS
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T.-H. Lin; C.-K. Wu; M.-C. Tsai; TSUNG-HSIEN LIN |
| 國立臺灣大學 |
2007 |
A 0.8-V 0.25-mW Current-Mirror OTA With 160-MHz GBW in 0.18-μm CMOS
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Lin, Tsung-Hsien; Wu, Chin-Kung; Tsai, Ming-Chung |
| 臺大學術典藏 |
2018-09-10T06:03:19Z |
A 0.8-V 0.25-mW Current-Mirror OTA with 160-MHz GBW in 0.18-μm CMOS
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C.-K. Wu; M.-C. Tsai; T.-H. Lin; TSUNG-HSIEN LIN |
| 國立臺灣大學 |
2002 |
A 0.8-V 128-Kb Four-Way Set-Associative Two-Level CMOS Cache Memory Using Two-Stage Wordline/Bitline-Oriented Tag-Compare (WLOTC/BLOTC) Scheme
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Lin, Perng-Fei; Kuo, J.B. |
显示项目 90696-90705 / 2348419 (共234842页)
<< < 9065 9066 9067 9068 9069 9070 9071 9072 9073 9074 > >>
每页显示[10|25|50]项目
|
