臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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显示项目 90911-90960 / 2348419 (共46969页)
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机构	日期	题名	作者
國立交通大學	2014-12-08T15:30:06Z	A 10 Gb/s Adaptive Cable Equalizer Using Phase Detection Technique in 0.13 mu m CMOS Technology	Chen, Kuang-Ren; Tsai, Chia-Ming; You, Sheng-Kai; Li, An-Siou; Chen, Wen-Tsao
臺大學術典藏	2004-05	A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier	Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang; Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang
國立臺灣大學	2004-05	A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier	Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang
國立交通大學	2014-12-08T15:25:19Z	A 10 GHz low power CMOS quadrature voltage-controlled oscillator	Tarng, Shih-Hao; Jou, Christina F.
臺大學術典藏	2009	A 10 GHz Phase-Locked Loop With a Compact Low-Pass Filter in 0.18 um CMOS	Li, Sin-Jhih; Hsieh, Hsieh-Hung; Lu, Liang-Hung; Li, Sin-Jhih; Hsieh, Hsieh-Hung; Lu, Liang-Hung
國立臺灣大學	2009	A 10 GHz Phase-Locked Loop With a Compact Low-Pass Filter in 0.18 um CMOS	Li, Sin-Jhih; Hsieh, Hsieh-Hung; Lu, Liang-Hung
臺大學術典藏	2018-09-10T07:43:05Z	A 10 GHz phase-locked loop with a compact low-pass filter in 0.18 μm CMOS	S.-J. Li;H.-H. Hsieh;L.-H. Lu; S.-J. Li; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2009	A 10 GHz phase-locked loop with a compact low-pass filter in 0.18 μm CMOS	Li, S.-J.;Hsieh, H.-H.;Lu, L.-H.; Li, S.-J.; Hsieh, H.-H.; Lu, L.-H.; LIANG-HUNG LU
國立交通大學	2014-12-08T15:15:22Z	A 10 similar to 18GHz wide-band transfonner feedback LNA	Chiang, Pei-Yuan; Jou, Christina. F.; Wu, Hui-I; Huang, Zhe-Yang
中國醫藥大學	2012-12-08	A 10 year-old boy bilious vomiting and abdominal pain for 2 weeks	黃鈺婷(Yu-Ting Huang);陳安琪(An-Chyi Chen);吳淑芬(Shu-Fen Wu);陳偉德(Walter Chen);黃鈺婷(Yu-Ting Huang)
國立交通大學	2014-12-08T15:14:09Z	A 10-110 GHz fundamental/harmonic rat-race mixer	Chi, Chun-Hsiang; Wu, Chung-Hung; Wang, Wei-Ting; Lai, Chi-Hau; Niu, Dow-Chih; Chang, Chi-Yang
臺大學術典藏	2020-06-11T06:34:52Z	A 10-20 Gb/s CDR circuit with 6200ppm frequency tracking	Huang, C.-C.;Tseng, K.-W.;Liu, S.-I.; Huang, C.-C.; Tseng, K.-W.; Liu, S.-I.; SHEN-IUAN LIU
國立臺灣大學	2008-07	A 10-35 GHz low power bulk-driven mixer using 0.13-μm CMOS process	Kuo, Chun-Lin; Huang, Bo-Jr; Kuo, Che-Chung; Lin, Kun-You; Wang, Huei
國立成功大學	2009-02	A 10-40 GHZ, Broadband Subharmonic Monolithic Mixer in 0.18 mu m CMOS Technology	Lin, Chih-Ming; Lin, Hua-Kuei; Lai, Yu-Ann; Chang, Chieh-Pin; Wang, Yeong-Her
國立交通大學	2014-12-08T15:03:43Z	A 10-B 225-MHZ CMOS DIGITAL-TO-ANALOG CONVERTER (DAC) WITH THRESHOLD-VOLTAGE COMPENSATED CURRENT SOURCES	CHIN, SY; WU, CY
臺大學術典藏	2018-09-10T09:21:52Z	A 10-b 320-MS/s stage-gain-error self-calibration pipeline ADC	Tseng, C.-J.;Chen, H.-W.;Shen, W.-T.;Cheng, W.-C.;Chen, H.-S.; Tseng, C.-J.; Chen, H.-W.; Shen, W.-T.; Cheng, W.-C.; Chen, H.-S.; HSIN-SHU CHEN
國立暨南國際大學	2013	A 10-b Two-Stage DAC with an Area-Efficient Multiple-Output Voltage Selector and a Linearity-Enhanced DAC-Embedded Op-Amp for LCD Column Driver ICs	蕭敬民; Hsiao, CM
國立暨南國際大學	2013	A 10-b Two-Stage DAC with an Area-Efficient Multiple-Output Voltage Selector and a Linearity-Enhanced DAC-Embedded Op-Amp for LCD Column Driver ICs	尹邦嚴; Yin, PY
國立成功大學	2019	A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC	Hu, Hu H.-J.;Cheng, Y.-S.;Chang, S.-J.
臺大學術典藏	2018-09-10T08:19:09Z	A 10-bit 100 MS/s 4.5 mW Pipelined ADC with a Time Sharing Techniques	Yen-Chuang Huang;Tai-Cheng Lee; Yen-Chuang Huang; Tai-Cheng Lee; TAI-CHENG LEE
國立臺灣科技大學	2017	A 10-bit 100-MS/s 2b/cycle-Assisted SAR ADC in 180nm CMOS	Chung, Y.-H.;Tseng, H.-W.
國立臺灣科技大學	2017	A 10-bit 100-MS/s SAR ADC with capacitor swapping technique in 90-nm CMOS	Chung, Y.-H.;Shih, Shih S.-Y.
國立臺灣科技大學	2014	A 10-bit 100MS/s successive approximation register analog-to-digital converter design	Huangy, J.-F.;Laiya, W.-C.;Hsiehy, C.-G.
國立臺灣科技大學	2019	A 10-bit 1026-Channel Column Driver IC with Partially Segmented Piecewise Linear Digital-to-Analog Converters for UHD TFT-LCDs with One Billion Color Display	Lu, C.-W.;Lai, Lee P.-Y.;Chang, Y.-G.;Huang, X.-W.;Cheng, J.-S.;Tseng, P.-Y.;Chou, Chou C.-H.;Chen, P.;Chang, T.-Y.;Liu, J.Y.-C.
中華大學	2005	A 10-bit 160-MSPS 2.5-V Segmented Current Steering CMOS DAC for WLAN Applications	田慶誠; Tien, Ching-Cheng
淡江大學	2005-06-14	A 10-bit 2.5 mW 0.27 mm2 CMOS DAC with spike-free switching	郭建宏; Kuo, Chien-hung; Tsai, Jen-chieh
國立臺灣科技大學	2014	A 10-bit 20 MS/s successive approximation register analog-to-digital converter using single-sided DAC switching method for control application	Lai, W.-C.;Huang, J.-F.;Hsieh, C.-G.
臺大學術典藏	2018-09-10T09:47:37Z	A 10-Bit 200 MS/s capacitor-sharing pipeline ADC	Tseng, C.-J.;Hsieh, Y.-C.;Yang, C.-H.;Chen, H.-S.; Tseng, C.-J.; Hsieh, Y.-C.; Yang, C.-H.; Chen, H.-S.; HSIN-SHU CHEN
國立交通大學	2014-12-08T15:30:05Z	A 10-Bit 200-MS/s Digitally-Calibrated Pipelined ADC Using Switching Opamps	Fang, Bing-Nan; Wu, Jieh-Tsorng
臺大學術典藏	2018-09-10T09:25:30Z	A 10-bit 200-MS/s Reconfigurable Pipelined A/D Converter	C-C Ho;T-C Lee; C-C Ho; T-C Lee; TAI-CHENG LEE
臺大學術典藏	2019-10-31T07:12:32Z	A 10-bit 200MS/s Capacitor-Sharing Pipeline ADC	HSIN-SHU CHEN;Hsin-Shu Chen;Ching-Hua Yang;Yi-Chun Hsieh;Chien-Jian Tseng; Chien-Jian Tseng; Yi-Chun Hsieh; Ching-Hua Yang; Hsin-Shu Chen; HSIN-SHU CHEN
中華大學	2006	A 10-bit 250-MSPS Digital to Analog Converter for WLAN Applications	田慶誠; Tien, Ching-Cheng
中華大學	2006	A 10-bit 250-MSPS Digital to Analog Converter for WLAN Applications	王志湖; Wang, Chih-Hu
臺大學術典藏	2021-05-24T13:07:20Z	A 10-bit 300 MS/s pipeline ADC with time-domain MDAC	HSIN-SHU CHEN; Tseng, Chien Jian; Chuang, Yu Wei; Chang, Chun Wei
臺大學術典藏	2021-09-02T00:04:59Z	A 10-bit 300 MS/s pipeline ADC with time-domain MDAC	Chen H.-S;Tseng C.-J;Chuang Y.-W;Chang C.-W.; Chen H.-S; Tseng C.-J; Chuang Y.-W; Chang C.-W.; HSIN-SHU CHEN
國立交通大學	2014-12-08T15:29:24Z	A 10-Bit 300-MS/s Pipelined ADC With Digital Calibration and Digital Bias Generation	Fang, Bing-Nan; Wu, Jieh-Tsorng
國立臺灣科技大學	2015	A 10-bit 40 MS/s successive approximation register analog-to-digital converter with Vcm-based method for wireless communications	Lai, W.C.
國立臺灣科技大學	2016	A 10-bit 40 MS/s successive approximation register analog-to-digital converter with Vcm-based method for wireless communications	Lai, W.C.
臺大學術典藏	2020-06-11T06:34:55Z	A 10-bit 40-MS/s Time-Domain Two-Step ADC with Short Calibration Time	Chen, L.-J.;Liu, S.-I.; Chen, L.-J.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏	2020-06-11T06:21:00Z	A 10-bit 400-MS/s 36-mW interleaved ADC	Huang, Y.-C.;Lin, C.-Y.;Lee, T.-C.; Huang, Y.-C.; Lin, C.-Y.; Lee, T.-C.; TAI-CHENG LEE
臺大學術典藏	2018-09-10T07:45:58Z	A 10-bit 500-KS/s low power SAR ADC with splitting comparator for bio-medical applications	Nai-Kuan Chou; Pang, W.-Y.; Wang, C.-S.; Chang, Y.-K.; Chou, N.-K.; Wang, C.-K.; Nai-Kuan Chou
臺大學術典藏	2020-03-09T07:30:51Z	A 10-bit 500-KS/s low power SAR ADC with splitting comparator for bio-medical applications	Pang W.-Y.; Wang C.-S.; Chang Y.-K.; NAI-KUAN CHOU; Wang C.-K.
義守大學	1998-08	A 10-Bit 50MHz Analog-to-Digital Converter Using Pipeline Architecture and Current-Mode Techniques	林啟元;Lin, Kai-yuen;涂振嘉;Twu, Chen-chia
淡江大學	2005	A 10-bit 50Msample/s pipelined analog-to-digital converter	黃世麟; Huang, Shih-lin
國立虎尾科技大學	2007	A 10-bit 60-MS/s low-power CMOS pipelined analog-to-digital converter	Lu, Chi-Chang;Lee, Tsung-Sum
亞洲大學	2015-01	A 10-bit current-steering CMOS digital to analog converter	易昶霈;Yi, Chang-Pei
亞洲大學	2015-01	A 10-bit current-steering CMOS digital to analog converter	易昶霈;Yi, Chang-Pei
亞洲大學	2015-01	A 10-bit current-steering CMOS digital to analog converter	Yi, 易昶霈 Chang-Pei
亞洲大學	2015/01	A 10-bit current-steering CMOS digital to analog converter	Yi, 易昶霈 Chang-Pei
亞洲大學	2015-01	A 10-bit current-steering CMOS digital to analog converter	Yi, 易昶霈；Chang-Pei

显示项目 90911-90960 / 2348419 (共46969页)
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每页显示[10|25|50]项目

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